[PATCH] D81397: [ARM] Better reductions

[Sam Parker via Phabricator via llvm-commits]

samparker added inline comments.


================
Comment at: llvm/lib/Target/ARM/ARMISelLowering.cpp:9322
+  // Use Mul(X, Rev(X)) until 4 items remain
+  while (NumActiveLanes > 4) {
+    unsigned RevOpcode = NumActiveLanes == 16 ? ARMISD::VREV16 : ARMISD::VREV32;
----------------
So, why 4? Is this beat and/or register pressure related? If these is beat related, shouldn't the subtarget be controlling this?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D81397/new/

https://reviews.llvm.org/D81397