[PATCH] D75751: [AArch64][SVE] Implement structured load intrinsics

Sander de Smalen via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jun 8 09:56:55 PDT 2020


sdesmalen added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp:1461
+
+  ReplaceUses(SDValue(N, NumVecs), SDValue(Load, 1));
+  CurDAG->RemoveDeadNode(N);
----------------
Is the above statement correct when having just replaced `SDValue(N, NumVecs-1)` in the loop above?


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:9763
+// non-power-of-2 tuple types used for LD3, such as nxv12i32.
+SDValue AArch64TargetLowering::LowerSVEStructuredLoad(unsigned Intrinsic,
+                                                      ArrayRef<SDValue> LoadOps,
----------------
nit: call this `LowerSVEStructLoad` ?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D75751/new/

https://reviews.llvm.org/D75751





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