[PATCH] D81307: [X86] Return 0 from TTI getNumberOfRegisters and getRegisterBitWidth on SSE1 only targets

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.
craig.topper added reviewers: RKSimon, spatel.
Herald added a subscriber: hiraditya.
Herald added a project: LLVM.
craig.topper edited the summary of this revision.

SSE1 only supports vectors of v4f32. We're pretty much dependent on cost model calculations to prevent vectors of doubles or integers being generated. Or we rely on the backend scalarizing them. Even with that I'm not that confident in our SSE1 codegen quality.

We found a failure where the vectorizer was generating a call to a v4f64 SVML function with SSE1 only. This resulted in argument handling in the backend breaking the type down into scalars. Disabling SSE1 here prevents part of that although it still doesn't stop the vectorizer from generating the v4f64 call with SSE2


https://reviews.llvm.org/D81307

Files:
  llvm/lib/Target/X86/X86TargetTransformInfo.cpp


Index: llvm/lib/Target/X86/X86TargetTransformInfo.cpp
===================================================================
--- llvm/lib/Target/X86/X86TargetTransformInfo.cpp
+++ llvm/lib/Target/X86/X86TargetTransformInfo.cpp
@@ -118,7 +118,8 @@
 
 unsigned X86TTIImpl::getNumberOfRegisters(unsigned ClassID) const {
   bool Vector = (ClassID == 1);
-  if (Vector && !ST->hasSSE1())
+  // SSE2 is required for integer vectors limiting usefulness with SSE1.
+  if (Vector && !ST->hasSSE2())
     return 0;
 
   if (ST->is64Bit()) {
@@ -136,7 +137,8 @@
       return 512;
     if (ST->hasAVX() && PreferVectorWidth >= 256)
       return 256;
-    if (ST->hasSSE1() && PreferVectorWidth >= 128)
+    // SSE2 is required for integer vectors limiting usefulness of SSE1.
+    if (ST->hasSSE2() && PreferVectorWidth >= 128)
       return 128;
     return 0;
   }


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D81307.268938.patch
Type: text/x-patch
Size: 855 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20200605/f30c7cf7/attachment.bin>