[llvm] 05e21f8 - [PowerPC][NFC] Add more PC Relative tests

Stefan Pintilie via llvm-commits llvm-commits at lists.llvm.org
Fri Jun 5 03:56:33 PDT 2020


Author: Stefan Pintilie
Date: 2020-06-05T05:55:03-05:00
New Revision: 05e21f8cea272ceb957a932233639e5ee0bd2574

URL: https://github.com/llvm/llvm-project/commit/05e21f8cea272ceb957a932233639e5ee0bd2574
DIFF: https://github.com/llvm/llvm-project/commit/05e21f8cea272ceb957a932233639e5ee0bd2574.diff

LOG: [PowerPC][NFC] Add more PC Relative tests

Modify the pcrel.ll test file to add more testing for PC Relative.

Added: 
    

Modified: 
    llvm/test/CodeGen/PowerPC/pcrel.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/PowerPC/pcrel.ll b/llvm/test/CodeGen/PowerPC/pcrel.ll
index d32933f357b2..539c6a909637 100644
--- a/llvm/test/CodeGen/PowerPC/pcrel.ll
+++ b/llvm/test/CodeGen/PowerPC/pcrel.ll
@@ -20,4 +20,36 @@ define dso_local double @ConstPool() local_unnamed_addr {
     ret double 0x406ECAB439581062
 }
 
+ at valIntLoc = common dso_local local_unnamed_addr global i32 0, align 4
+define dso_local signext i32 @ReadLocalVarInt() local_unnamed_addr  {
+; CHECK-S-LABEL: ReadLocalVarInt
+; CHECK-S:       # %bb.0: # %entry
+; CHECK-S-NEXT:    plwa r3, valIntLoc at PCREL(0), 1
+; CHECK-S-NEXT:    blr
 
+; CHECK-O-LABEL: ReadLocalVarInt
+; CHECK-O:         plwa 3, 0(0), 1
+; CHECK-O-NEXT:    R_PPC64_PCREL34 valIntLoc
+; CHECK-O-NEXT:    blr
+entry:
+  %0 = load i32, i32* @valIntLoc, align 4
+  ret i32 %0
+}
+
+ at valIntGlob = external global i32, align 4
+define dso_local signext i32 @ReadGlobalVarInt() local_unnamed_addr  {
+; CHECK-S-LABEL: ReadGlobalVarInt
+; CHECK-S:       # %bb.0: # %entry
+; CHECK-S-NEXT:    pld r3, valIntGlob at got@pcrel(0), 1
+; CHECK-S-NEXT:    lwa r3, 0(r3)
+; CHECK-S-NEXT:    blr
+
+; CHECK-O-LABEL: ReadGlobalVarInt
+; CHECK-O:         pld 3, 0(0), 1
+; CHECK-O-NEXT:    R_PPC64_GOT_PCREL34 valIntGlob
+; CHECK-O-NEXT:    lwa 3, 0(3)
+; CHECK-O-NEXT:    blr
+entry:
+  %0 = load i32, i32* @valIntGlob, align 4
+  ret i32 %0
+}


        


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