[llvm] de38e88 - [x86] add FileCheck / assertions to test; NFC
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 4 05:34:36 PDT 2020
Author: Sanjay Patel
Date: 2020-06-04T08:34:25-04:00
New Revision: de38e882bb6510e8bf1685f474cd52adb4d145e5
URL: https://github.com/llvm/llvm-project/commit/de38e882bb6510e8bf1685f474cd52adb4d145e5
DIFF: https://github.com/llvm/llvm-project/commit/de38e882bb6510e8bf1685f474cd52adb4d145e5.diff
LOG: [x86] add FileCheck / assertions to test; NFC
Added:
Modified:
llvm/test/CodeGen/X86/membarrier.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/membarrier.ll b/llvm/test/CodeGen/X86/membarrier.ll
index 45827ae73ecd..59b9365f294a 100644
--- a/llvm/test/CodeGen/X86/membarrier.ll
+++ b/llvm/test/CodeGen/X86/membarrier.ll
@@ -1,12 +1,20 @@
-; RUN: llc < %s -mtriple=x86_64-- -mattr=-sse -O0
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-- -mattr=-sse -O0 | FileCheck %s
; PR9675
define i32 @t() {
-entry:
+; CHECK-LABEL: t:
+; CHECK: # %bb.0:
+; CHECK-NEXT: xorl %eax, %eax
+; CHECK-NEXT: movl $1, -{{[0-9]+}}(%rsp)
+; CHECK-NEXT: mfence
+; CHECK-NEXT: lock decl -{{[0-9]+}}(%rsp)
+; CHECK-NEXT: mfence
+; CHECK-NEXT: retq
%i = alloca i32, align 4
store i32 1, i32* %i, align 4
fence seq_cst
- %0 = atomicrmw sub i32* %i, i32 1 monotonic
+ %t0 = atomicrmw sub i32* %i, i32 1 monotonic
fence seq_cst
ret i32 0
}
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