[PATCH] D81139: [ARM] MVE VCVT lowering for f32->f16 truncs

Dave Green via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jun 4 04:18:03 PDT 2020


dmgreen created this revision.
dmgreen added reviewers: SjoerdMeijer, samparker, efriedma, simon_tatham, ostannard.
Herald added subscribers: danielkiss, hiraditya, kristof.beyls.
Herald added a project: LLVM.

This adds code to lower f32 to f16 fp_trunc's using a pair of MVE VCVT instructions. Due to v4f16 not being legal, fp_round are often split up fairly early. So this reconstructs the vcvt's from a buildvector of fp_rounds from two vector inputs. Something like:

  BUILDVECTOR(FP_ROUND(EXTRACT_ELT(X, 0),
             FP_ROUND(EXTRACT_ELT(Y, 0),
             FP_ROUND(EXTRACT_ELT(X, 1),
             FP_ROUND(EXTRACT_ELT(Y, 1), ...)

It adds a VCVTN node to handle this, which like VMOVN or VQMOVN lowers into the top/bottom lanes of an MVE instruction.


https://reviews.llvm.org/D81139

Files:
  llvm/lib/Target/ARM/ARMISelLowering.cpp
  llvm/lib/Target/ARM/ARMISelLowering.h
  llvm/lib/Target/ARM/ARMInstrMVE.td
  llvm/test/CodeGen/Thumb2/mve-fp16convertloops.ll
  llvm/test/CodeGen/Thumb2/mve-vcvt16.ll

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