[llvm] a574edb - X86: Switch fastregalloc test to use generated checks

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Wed Jun 3 13:46:18 PDT 2020


Author: Matt Arsenault
Date: 2020-06-03T16:46:00-04:00
New Revision: a574edbba2b24fcfb733aa2d82308131f5b7d2d6

URL: https://github.com/llvm/llvm-project/commit/a574edbba2b24fcfb733aa2d82308131f5b7d2d6
DIFF: https://github.com/llvm/llvm-project/commit/a574edbba2b24fcfb733aa2d82308131f5b7d2d6.diff

LOG: X86: Switch fastregalloc test to use generated checks

Added: 
    

Modified: 
    llvm/test/CodeGen/X86/2010-06-28-FastAllocTiedOperand.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/X86/2010-06-28-FastAllocTiedOperand.ll b/llvm/test/CodeGen/X86/2010-06-28-FastAllocTiedOperand.ll
index 96ceb1985810..6a43e864e965 100644
--- a/llvm/test/CodeGen/X86/2010-06-28-FastAllocTiedOperand.ll
+++ b/llvm/test/CodeGen/X86/2010-06-28-FastAllocTiedOperand.ll
@@ -1,4 +1,5 @@
-; RUN: llc < %s -O0 -no-integrated-as | FileCheck %s
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -O0 -no-integrated-as -verify-machineinstrs | FileCheck %s
 ; PR7509
 target triple = "i386-apple-darwin10"
 %asmtype = type { i32, i8*, i32, i32 }
@@ -6,13 +7,27 @@ target triple = "i386-apple-darwin10"
 ; Arguments 1 and 4 must be the same. No other output arguments may be
 ; allocated %eax.
 
-; CHECK: InlineAsm Start
-; CHECK: arg1 %[[A1:...]]
-; CHECK-NOT: ax
-; CHECK: arg4 %[[A1]]
-; CHECK: InlineAsm End
-
 define i32 @func(i8* %s) nounwind ssp {
+; CHECK-LABEL: func:
+; CHECK:       ## %bb.0: ## %entry
+; CHECK-NEXT:    pushl %edi
+; CHECK-NEXT:    pushl %esi
+; CHECK-NEXT:    pushl %eax
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT:    movl %eax, (%esp) ## 4-byte Spill
+; CHECK-NEXT:    movl (%esp), %ecx ## 4-byte Reload
+; CHECK-NEXT:    ## InlineAsm Start
+; CHECK-NEXT:    arg0 %eax
+; CHECK-NEXT:    arg1 %ecx
+; CHECK-NEXT:    arg2 %edx
+; CHECK-NEXT:    arg3 %esi
+; CHECK-NEXT:    arg4 %ecx
+; CHECK-NEXT:    ## InlineAsm End
+; CHECK-NEXT:    movl %ecx, %edi
+; CHECK-NEXT:    addl $4, %esp
+; CHECK-NEXT:    popl %esi
+; CHECK-NEXT:    popl %edi
+; CHECK-NEXT:    retl
 entry:
   %0 = tail call %asmtype asm "arg0 $0\0A\09arg1 $1\0A\09arg2 $2\0A\09arg3 $3\0A\09arg4 $4", "={ax},=r,=r,=r,1,~{dirflag},~{fpsr},~{flags}"(i8* %s) nounwind, !srcloc !0 ; <%0> [#uses=1]
   %asmresult = extractvalue %asmtype %0, 0              ; <i64> [#uses=1]


        


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