[PATCH] D81108: [AArch64] Fix ldst-opt of multiple disjunct subregs.

[Florian Hahn via Phabricator via llvm-commits]

fhahn marked an inline comment as done.
fhahn added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp:1296
+      // impacting other instructions we did not check. Bail out.
+      if (RegClass->HasDisjunctSubRegs) {
+        LLVM_DEBUG(
----------------
efriedma wrote:
> The fact that this doesn't whitelist specific opcodes makes me suspicious this is overlooking other potential issues.  Some instructions with two outputs require that they aren't equal.  A call instruction modifies a fixed register.  Some instructions have restricted register classes.
I initially thought relying on `renamable` should be enough for the cases mentioned above. The code to pick registers should already only pick out of the most restrictive register class.  It seemed to work quite well in practice so far. The problem with the disjunct sub register case is that those are represented as a single register in the result, but with as individual register when accessed by their users.

But it would probably be safer to have a whitelist. Do you know if there's a convenient way to do so for machine instructions, other than providing a really long list of opcodes?




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https://reviews.llvm.org/D81108