[llvm] c65c1d7 - [X86] Autogenerate complete checks. NFC

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2020-05-29T23:45:04-07:00
New Revision: c65c1d78931e262b5117278a8ee0a703d1be073c

URL: https://github.com/llvm/llvm-project/commit/c65c1d78931e262b5117278a8ee0a703d1be073c
DIFF: https://github.com/llvm/llvm-project/commit/c65c1d78931e262b5117278a8ee0a703d1be073c.diff

LOG: [X86] Autogenerate complete checks. NFC

Added: 
    

Modified: 
    llvm/test/CodeGen/X86/i1narrowfail.ll
    llvm/test/CodeGen/X86/narrow_op-1.ll

Removed: 
    


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diff  --git a/llvm/test/CodeGen/X86/i1narrowfail.ll b/llvm/test/CodeGen/X86/i1narrowfail.ll
index 4f9a75672bfc..282d1ac28f59 100644
--- a/llvm/test/CodeGen/X86/i1narrowfail.ll
+++ b/llvm/test/CodeGen/X86/i1narrowfail.ll
@@ -1,8 +1,11 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s
 
-; CHECK-LABEL: @foo
-; CHECK: orb     $16
 define void @foo(i64* %ptr) {
+; CHECK-LABEL: foo:
+; CHECK:       ## %bb.0:
+; CHECK-NEXT:    orb $16, (%rdi)
+; CHECK-NEXT:    retq
   %r11 = load i64, i64* %ptr, align 8
   %r12 = or i64 16, %r11
   store i64 %r12, i64* %ptr, align 8

diff  --git a/llvm/test/CodeGen/X86/narrow_op-1.ll b/llvm/test/CodeGen/X86/narrow_op-1.ll
index 96751abde28d..dc24b190ea91 100644
--- a/llvm/test/CodeGen/X86/narrow_op-1.ll
+++ b/llvm/test/CodeGen/X86/narrow_op-1.ll
@@ -1,28 +1,31 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
 
 	%struct.bf = type { i64, i16, i16, i32 }
 @bfi = common global %struct.bf zeroinitializer, align 16
 
 define void @t1() nounwind optsize ssp {
+; CHECK-LABEL: t1:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    orb $1, bfi+{{.*}}(%rip)
+; CHECK-NEXT:    retq
 entry:
 	%0 = load i32, i32* bitcast (i16* getelementptr (%struct.bf, %struct.bf* @bfi, i32 0, i32 1) to i32*), align 8
 	%1 = or i32 %0, 65536
 	store i32 %1, i32* bitcast (i16* getelementptr (%struct.bf, %struct.bf* @bfi, i32 0, i32 1) to i32*), align 8
 	ret void
 
-; CHECK-LABEL: t1:
-; CHECK: orb $1
-; CHECK-NEXT: ret
 }
 
 define void @t2() nounwind optsize ssp {
+; CHECK-LABEL: t2:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    orl $16842752, bfi+{{.*}}(%rip) # imm = 0x1010000
+; CHECK-NEXT:    retq
 entry:
 	%0 = load i32, i32* bitcast (i16* getelementptr (%struct.bf, %struct.bf* @bfi, i32 0, i32 1) to i32*), align 8
 	%1 = or i32 %0, 16842752
 	store i32 %1, i32* bitcast (i16* getelementptr (%struct.bf, %struct.bf* @bfi, i32 0, i32 1) to i32*), align 8
 	ret void
 
-; CHECK-LABEL: t2:
-; CHECK: orl $16842752
-; CHECK-NEXT: ret
 }