[llvm] 5c7aca6 - [X86] Ignore large code model in X86FastISel::X86MaterializeFP in 32-bit mode
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Fri May 29 10:39:55 PDT 2020
Author: Craig Topper
Date: 2020-05-29T10:39:08-07:00
New Revision: 5c7aca6a4c8c93f1af3cdac676151f8d7e28a410
URL: https://github.com/llvm/llvm-project/commit/5c7aca6a4c8c93f1af3cdac676151f8d7e28a410
DIFF: https://github.com/llvm/llvm-project/commit/5c7aca6a4c8c93f1af3cdac676151f8d7e28a410.diff
LOG: [X86] Ignore large code model in X86FastISel::X86MaterializeFP in 32-bit mode
Large code model doesn't mean anything to 32-bit mode. But nothing
prevents it from being set. Ignore to avoid generating 64-bit mode
only instructions.
Differential Revision: https://reviews.llvm.org/D80768
Added:
Modified:
llvm/lib/Target/X86/X86FastISel.cpp
llvm/test/CodeGen/X86/fast-isel-constpool.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86FastISel.cpp b/llvm/lib/Target/X86/X86FastISel.cpp
index 5a51e249f5ce..c5ae67fe081d 100644
--- a/llvm/lib/Target/X86/X86FastISel.cpp
+++ b/llvm/lib/Target/X86/X86FastISel.cpp
@@ -3787,7 +3787,8 @@ unsigned X86FastISel::X86MaterializeFP(const ConstantFP *CFP, MVT VT) {
unsigned CPI = MCP.getConstantPoolIndex(CFP, Alignment);
unsigned ResultReg = createResultReg(TLI.getRegClassFor(VT.SimpleTy));
- if (CM == CodeModel::Large) {
+ // Large code model only applies to 64-bit mode.
+ if (Subtarget->is64Bit() && CM == CodeModel::Large) {
unsigned AddrReg = createResultReg(&X86::GR64RegClass);
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(X86::MOV64ri),
AddrReg)
diff --git a/llvm/test/CodeGen/X86/fast-isel-constpool.ll b/llvm/test/CodeGen/X86/fast-isel-constpool.ll
index 706674c584ba..f1aacc7ceab4 100644
--- a/llvm/test/CodeGen/X86/fast-isel-constpool.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-constpool.ll
@@ -6,9 +6,10 @@
; RUN: llc -mtriple=x86_64-apple-darwin -fast-isel -code-model=small -mattr=avx512f < %s | FileCheck %s --check-prefix=AVX
; RUN: llc -mtriple=x86_64-apple-darwin -fast-isel -code-model=large -mattr=avx512f < %s | FileCheck %s --check-prefix=LARGE_AVX
-; This large code mode shouldn't mean anything on x86 but it currently
-; generates 64-bit only instructions and will assert in the encoder.
-; RUN: llc -mtriple=i686-apple-darwin -fast-isel -code-model=large -mattr=sse2 < %s | FileCheck %s --check-prefix=X86-LARGE
+; This large code mode shouldn't mean anything on x86 but it used to
+; generate 64-bit only instructions and asserted in the encoder.
+; -show-mc-encoding here to assert if this breaks again.
+; RUN: llc -mtriple=i686-apple-darwin -fast-isel -code-model=large -mattr=sse2 -show-mc-encoding < %s | FileCheck %s --check-prefix=X86-LARGE
; Make sure fast isel uses rip-relative addressing for the small code model.
define float @constpool_float(float %x) {
@@ -38,14 +39,16 @@ define float @constpool_float(float %x) {
;
; X86-LARGE-LABEL: constpool_float:
; X86-LARGE: ## %bb.0:
-; X86-LARGE-NEXT: pushl %eax
+; X86-LARGE-NEXT: pushl %eax ## encoding: [0x50]
; X86-LARGE-NEXT: .cfi_def_cfa_offset 8
-; X86-LARGE-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
-; X86-LARGE-NEXT: addss LCPI0_0, %xmm0
-; X86-LARGE-NEXT: movss %xmm0, (%esp)
-; X86-LARGE-NEXT: flds (%esp)
-; X86-LARGE-NEXT: popl %eax
-; X86-LARGE-NEXT: retl
+; X86-LARGE-NEXT: movss {{[0-9]+}}(%esp), %xmm0 ## encoding: [0xf3,0x0f,0x10,0x44,0x24,0x08]
+; X86-LARGE-NEXT: ## xmm0 = mem[0],zero,zero,zero
+; X86-LARGE-NEXT: addss LCPI0_0, %xmm0 ## encoding: [0xf3,0x0f,0x58,0x05,A,A,A,A]
+; X86-LARGE-NEXT: ## fixup A - offset: 4, value: LCPI0_0, kind: FK_Data_4
+; X86-LARGE-NEXT: movss %xmm0, (%esp) ## encoding: [0xf3,0x0f,0x11,0x04,0x24]
+; X86-LARGE-NEXT: flds (%esp) ## encoding: [0xd9,0x04,0x24]
+; X86-LARGE-NEXT: popl %eax ## encoding: [0x58]
+; X86-LARGE-NEXT: retl ## encoding: [0xc3]
%1 = fadd float %x, 16.50e+01
ret float %1
@@ -78,13 +81,15 @@ define double @constpool_double(double %x) nounwind {
;
; X86-LARGE-LABEL: constpool_double:
; X86-LARGE: ## %bb.0:
-; X86-LARGE-NEXT: subl $12, %esp
-; X86-LARGE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
-; X86-LARGE-NEXT: addsd LCPI1_0, %xmm0
-; X86-LARGE-NEXT: movsd %xmm0, (%esp)
-; X86-LARGE-NEXT: fldl (%esp)
-; X86-LARGE-NEXT: addl $12, %esp
-; X86-LARGE-NEXT: retl
+; X86-LARGE-NEXT: subl $12, %esp ## encoding: [0x83,0xec,0x0c]
+; X86-LARGE-NEXT: movsd {{[0-9]+}}(%esp), %xmm0 ## encoding: [0xf2,0x0f,0x10,0x44,0x24,0x10]
+; X86-LARGE-NEXT: ## xmm0 = mem[0],zero
+; X86-LARGE-NEXT: addsd LCPI1_0, %xmm0 ## encoding: [0xf2,0x0f,0x58,0x05,A,A,A,A]
+; X86-LARGE-NEXT: ## fixup A - offset: 4, value: LCPI1_0, kind: FK_Data_4
+; X86-LARGE-NEXT: movsd %xmm0, (%esp) ## encoding: [0xf2,0x0f,0x11,0x04,0x24]
+; X86-LARGE-NEXT: fldl (%esp) ## encoding: [0xdd,0x04,0x24]
+; X86-LARGE-NEXT: addl $12, %esp ## encoding: [0x83,0xc4,0x0c]
+; X86-LARGE-NEXT: retl ## encoding: [0xc3]
%1 = fadd double %x, 8.500000e-01
ret double %1
@@ -123,12 +128,13 @@ define void @constpool_float_no_fp_args(float* %x) nounwind {
;
; X86-LARGE-LABEL: constpool_float_no_fp_args:
; X86-LARGE: ## %bb.0:
-; X86-LARGE-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-LARGE-NEXT: movabsq $LCPI2_0, %rcx
-; X86-LARGE-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
-; X86-LARGE-NEXT: addss (%eax), %xmm0
-; X86-LARGE-NEXT: movss %xmm0, (%eax)
-; X86-LARGE-NEXT: retl
+; X86-LARGE-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
+; X86-LARGE-NEXT: movss LCPI2_0, %xmm0 ## encoding: [0xf3,0x0f,0x10,0x05,A,A,A,A]
+; X86-LARGE-NEXT: ## fixup A - offset: 4, value: LCPI2_0, kind: FK_Data_4
+; X86-LARGE-NEXT: ## xmm0 = mem[0],zero,zero,zero
+; X86-LARGE-NEXT: addss (%eax), %xmm0 ## encoding: [0xf3,0x0f,0x58,0x00]
+; X86-LARGE-NEXT: movss %xmm0, (%eax) ## encoding: [0xf3,0x0f,0x11,0x00]
+; X86-LARGE-NEXT: retl ## encoding: [0xc3]
%a = load float, float* %x
%b = fadd float %a, 16.50e+01
store float %b, float* %x
@@ -168,12 +174,13 @@ define void @constpool_double_no_fp_args(double* %x) nounwind {
;
; X86-LARGE-LABEL: constpool_double_no_fp_args:
; X86-LARGE: ## %bb.0:
-; X86-LARGE-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-LARGE-NEXT: movabsq $LCPI3_0, %rcx
-; X86-LARGE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
-; X86-LARGE-NEXT: addsd (%eax), %xmm0
-; X86-LARGE-NEXT: movsd %xmm0, (%eax)
-; X86-LARGE-NEXT: retl
+; X86-LARGE-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
+; X86-LARGE-NEXT: movsd LCPI3_0, %xmm0 ## encoding: [0xf2,0x0f,0x10,0x05,A,A,A,A]
+; X86-LARGE-NEXT: ## fixup A - offset: 4, value: LCPI3_0, kind: FK_Data_4
+; X86-LARGE-NEXT: ## xmm0 = mem[0],zero
+; X86-LARGE-NEXT: addsd (%eax), %xmm0 ## encoding: [0xf2,0x0f,0x58,0x00]
+; X86-LARGE-NEXT: movsd %xmm0, (%eax) ## encoding: [0xf2,0x0f,0x11,0x00]
+; X86-LARGE-NEXT: retl ## encoding: [0xc3]
%a = load double, double* %x
%b = fadd double %a, 8.500000e-01
store double %b, double* %x
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