[PATCH] D80811: [ARM] Balance register usage when sinking splats
Dave Green via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri May 29 09:13:11 PDT 2020
dmgreen created this revision.
dmgreen added reviewers: simon_tatham, SjoerdMeijer, efriedma, samparker, ostannard.
Herald added subscribers: danielkiss, hiraditya, kristof.beyls.
Herald added a project: LLVM.
If we sink a splat into a loop in order to make more use of MVE r reg instructions, we can sometimes get to a point where we go over the register limit, leading to more spills in the loop than we helped by not using the q reg. In order to alleviate that this patch attempts to come up with a rough estimate of the number of different registers used in a loop, and doesn't sink if there are free Q regs but no free R regs.
I had to add some LoopInfo update too, in order to prevent the LoopInfo containing stale information.
https://reviews.llvm.org/D80811
Files:
llvm/include/llvm/CodeGen/TargetLowering.h
llvm/lib/CodeGen/CodeGenPrepare.cpp
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/lib/Target/AArch64/AArch64ISelLowering.h
llvm/lib/Target/ARM/ARMISelLowering.cpp
llvm/lib/Target/ARM/ARMISelLowering.h
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/lib/Target/X86/X86ISelLowering.h
llvm/test/CodeGen/Thumb2/mve-gather-scatter-optimisation.ll
llvm/test/CodeGen/Thumb2/mve-sinkbalance.ll
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