[PATCH] D79864: [PowerPC] Add new linker optimization for PowerPC

[Amy Kwan via Phabricator via llvm-commits]

amyk added inline comments.


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Comment at: llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp:95
 
+  unsigned LastOp = MI->getNumOperands()-1;
+  if (MI->getNumOperands() > 1) {
----------------
Maybe add a short comment here about the relocation printing, since other cases are also documented.


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Comment at: llvm/lib/Target/PowerPC/PPCInstrPrefix.td:504
+  let isNotDuplicable = 1,isCodeGenOnly = 1, mayLoad = 1, mayStore = 0 in {
+    def PLDpcnocopy :PPCEmitTimePseudo<(outs g8rc:$RT),
+                                       (ins memri34_pcrel:$D_RA),
----------------
nit: space after the `:`.


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Comment at: llvm/lib/Target/PowerPC/PPCMIPeephole.cpp:405
+        // The use of this register must be as part of the address and not
+        // part of operand zero of a store.
+        if (ResultOp == Use.getOperand(0).getReg())
----------------
Would it be good to check if it is indeed a store instruction? Something like `Use.mayStore()`, though I realize it might be a bit redundant if we reached this part of the code.


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  https://reviews.llvm.org/D79864/new/

https://reviews.llvm.org/D79864