[PATCH] D80457: AMDGPU/GlobalISel: Fixed handling of non-standard vectors

Stanislav Mekhanoshin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue May 26 15:50:41 PDT 2020


rampitec marked an inline comment as done.
rampitec added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp:1333
 const TargetRegisterClass *
-SIRegisterInfo::getVGPRClassForBitWidth(unsigned BitWidth) {
+SIRegisterInfo::getVGPRClassForBitWidth(unsigned BitWidth, bool Exact) {
   switch (BitWidth) {
----------------
NB: Nothing breaks even if I remove Exact argument and always use if statements.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D80457/new/

https://reviews.llvm.org/D80457





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