[PATCH] D80208: [CodeGen] Add support for extracting elements of scalable vectors

Eli Friedman via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue May 26 11:58:47 PDT 2020


efriedma added inline comments.


================
Comment at: llvm/test/CodeGen/AArch64/sve-extract-element.ll:171
+; CHECK-NEXT:    mov w8, #9
+; CHECK-NEXT:    whilels p0.d, #0, x8
+; CHECK-NEXT:    lastb d0, p0, z0.d
----------------
david-arm wrote:
> david-arm wrote:
> > efriedma wrote:
> > > This doesn't assemble.  (I assume you meant to refer to xzr?)
> > OK, I'll take a look. I built and ran a test for variants of v16i8, but missed this,
> Hi Eli, I tried assembling this and it worked for me with this command:
> 
> llc --filetype=obj -mtriple=aarch64-linux-gnu -mattr=+sve < ../llvm/test/CodeGen/AArch64/sve-extract-element.ll > test.o
> 
> What command did you use?
`echo "whilels p0.d, #0, x8" | llvm-mc -triple=aarch64 -mattr=+sve`


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  https://reviews.llvm.org/D80208/new/

https://reviews.llvm.org/D80208





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