[PATCH] D80028: [AArch64] Support expression results as immediate values in mov

[Eli Friedman via Phabricator via llvm-commits]

efriedma added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp:974
+    const MCExpr *E = dyn_cast<MCExpr>(getImm());
+    if (const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(E)) {
+      uint64_t Value = CE->getValue();
----------------
jcai19 wrote:
> efriedma wrote:
> > What happens when Shift isn't zero?
> Thank you for the comments. And sorry for the delay, I was trying to look into the cases where the value of Shift is not zero. However,  even gcc could not support mov instructions with shift operand.
> 
> $ cat foo.s
> mov x0, 0x1, lsl 16
> 
> $ aarch64-linux-gnu-gcc -c foo.s
> foo.s: Assembler messages:
> foo.s:1: Error: unexpected characters following instruction at operand 2 -- `mov x0,0x1,lsl 16'
> 
> So far the only cases I found with non-zero Shift is during instruction matching stage, when different values of Shift are tried out, and that should not affect this code. Are there additional cases that would cause Shift to not be zero?
This codepath triggers for constructs like "mov x0, 0x10000".


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Comment at: llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp:250
     AArch64MCExpr::VariantKind RefKind =
         static_cast<AArch64MCExpr::VariantKind>(Target.getRefKind());
+    if (!RefKind) {
----------------
jcai19 wrote:
> efriedma wrote:
> > I'd prefer to explicitly compute a RefKind here, as opposed to inferring that a null RefKind has some specific meaning.
> We don't currently have a RefKind corresponding to zero. Should we add one?
I haven't looked carefully at the implications, but I think we should wrap the expressions in an AArch64MCExpr so we can set an appropriate RefKind.


Repository:
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  https://reviews.llvm.org/D80028/new/

https://reviews.llvm.org/D80028