[PATCH] D80364: [amdgpu] Teach load widening to handle non-DWORD aligned loads.

[Michael Liao via Phabricator via llvm-commits]

hliao updated this revision to Diff 265945.
hliao added a comment.
Herald added a subscriber: mgorny.

Rewrite such transformations in LLVM IR as the late codegen preparation.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D80364/new/

https://reviews.llvm.org/D80364

Files:
  llvm/lib/Target/AMDGPU/AMDGPU.h
  llvm/lib/Target/AMDGPU/AMDGPULateCodeGenPrepare.cpp
  llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
  llvm/lib/Target/AMDGPU/CMakeLists.txt
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dispatch.ptr.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D80364.265945.patch
Type: text/x-patch
Size: 10648 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20200524/f5df6e08/attachment-0001.bin>