[PATCH] D80466: [X86] Improve i8 + 'slow' i16 funnel shift codegen

Simon Pilgrim via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sat May 23 11:39:37 PDT 2020


RKSimon added a comment.

In D80466#2052153 <https://reviews.llvm.org/D80466#2052153>, @lebedev.ri wrote:

> LGTM
>
> For `fshl` case, we could introduce some more ILP: http://volta.cs.utah.edu:8080/z/UJ6viM
>  https://godbolt.org/z/xsJgPb  https://godbolt.org/z/5W26NV
>  Not sure it would be an improvement?
>  As a sidenote, we clearly don't fold to either variant in DAGCombiner.


Looking at these cases in llvm-mca with 'slow shld' targets (btver2/bdver2/znver*) the naive cases all seem to give better throughput


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