[PATCH] D80459: [AArch64][GlobalISel] Don't bail out of folding in extends into WRO addressing modes.

Amara Emerson via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri May 22 15:34:16 PDT 2020


aemerson created this revision.
aemerson added a reviewer: paquette.
aemerson added a project: LLVM.
Herald added subscribers: danielkiss, hiraditya, kristof.beyls, rovka.

We were doing an additional check to see if a G_SEXT is worth folding into a mem op compared to SelectionDAG. In terms of code size it's usually a wash.

I'm not entirely sure this is the right thing to do, I don't have performance numbers to show any difference with this either way.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D80459

Files:
  llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/load-wro-addressing-modes.mir


Index: llvm/test/CodeGen/AArch64/GlobalISel/load-wro-addressing-modes.mir
===================================================================
--- llvm/test/CodeGen/AArch64/GlobalISel/load-wro-addressing-modes.mir
+++ llvm/test/CodeGen/AArch64/GlobalISel/load-wro-addressing-modes.mir
@@ -428,3 +428,44 @@
     $x1 = COPY %load(s64)
     RET_ReallyLR implicit $x1
 ...
+---
+name:            extend_only_multi_use
+alignment:       4
+legalized:       true
+regBankSelected: true
+selected:        false
+tracksRegLiveness: true
+frameInfo:
+  maxAlignment:    1
+fixedStack:      []
+stack:           []
+callSites:       []
+constants:       []
+machineFunctionInfo: {}
+body:             |
+  bb.1.entry:
+    liveins: $w0, $x1
+    ; Check that even if the G_SEXT is used by another instruction we still
+    ; fold it into the load, to match SDAG.
+    ; CHECK-LABEL: name: extend_only_multi_use
+    ; CHECK: liveins: $w0, $x1
+    ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
+    ; CHECK: [[COPY1:%[0-9]+]]:gpr64sp = COPY $x1
+    ; CHECK: [[DEF:%[0-9]+]]:gpr64all = IMPLICIT_DEF
+    ; CHECK: [[INSERT_SUBREG:%[0-9]+]]:gpr64 = INSERT_SUBREG [[DEF]], [[COPY]], %subreg.sub_32
+    ; CHECK: [[SBFMXri:%[0-9]+]]:gpr64 = SBFMXri [[INSERT_SUBREG]], 0, 31
+    ; CHECK: [[LDRBBroW:%[0-9]+]]:gpr32 = LDRBBroW [[COPY1]], [[COPY]], 1, 0 :: (load 1)
+    ; CHECK: %other_use:gpr64 = ADDXrr [[SBFMXri]], [[SBFMXri]]
+    ; CHECK: $w0 = COPY [[LDRBBroW]]
+    ; CHECK: $x1 = COPY %other_use
+    ; CHECK: RET_ReallyLR implicit $w0
+    %0:gpr(s32) = COPY $w0
+    %1:gpr(p0) = COPY $x1
+    %4:gpr(s64) = G_SEXT %0(s32)
+    %5:gpr(p0) = G_PTR_ADD %1, %4(s64)
+    %296:gpr(s32) = G_ZEXTLOAD %5(p0) :: (load 1)
+    %other_use:gpr(s64) = G_ADD %4(s64), %4(s64)
+    $w0 = COPY %296(s32)
+    $x1 = COPY %other_use(s64)
+    RET_ReallyLR implicit $w0
+...
Index: llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
===================================================================
--- llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
+++ llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
@@ -5075,9 +5075,6 @@
   //
   // e.g.
   // ldr something, [base_reg, ext_reg, sxtw]
-  if (!isWorthFoldingIntoExtendedReg(*OffsetInst, MRI))
-    return None;
-
   // Check if this is an extend. We'll get an extend type if it is.
   AArch64_AM::ShiftExtendType Ext =
       getExtendTypeForInst(*OffsetInst, MRI, /*IsLoadStore=*/true);


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D80459.265810.patch
Type: text/x-patch
Size: 2435 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20200522/85e173ab/attachment.bin>


More information about the llvm-commits mailing list