[PATCH] D80161: [CodeGen] Add support for multiple memory operands in MachineInstr::mayAlias

Eli Friedman via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu May 21 12:59:42 PDT 2020


efriedma accepted this revision.
efriedma added a comment.
This revision is now accepted and ready to land.

LGTM with one small change.



================
Comment at: llvm/test/CodeGen/X86/instr-sched-multiple-memops.mir:1
+# RUN: llc -mtriple=i686-- -o - -run-pass=machine-scheduler -debug %s 2>&1 | FileCheck %s
+
----------------
"# REQUIRES: asserts"; release builds don't support the "-debug" flag.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D80161/new/

https://reviews.llvm.org/D80161





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