[llvm] ae5ab2f - [LegalizeDAG] Modify ExpandLegalINT_TO_FP to swap data for little/big endian instead of the pointers.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Wed May 20 22:41:46 PDT 2020
Author: Craig Topper
Date: 2020-05-20T22:29:59-07:00
New Revision: ae5ab2f40a35b87eb173b8b7e8738c589c3d3555
URL: https://github.com/llvm/llvm-project/commit/ae5ab2f40a35b87eb173b8b7e8738c589c3d3555
DIFF: https://github.com/llvm/llvm-project/commit/ae5ab2f40a35b87eb173b8b7e8738c589c3d3555.diff
LOG: [LegalizeDAG] Modify ExpandLegalINT_TO_FP to swap data for little/big endian instead of the pointers.
Will make it easier to pass the pointer info and alignment
correctly to the loads/stores.
While there also make the i32 stores independent and use a token
factor to join before the load.
Added:
Modified:
llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
llvm/test/CodeGen/Mips/cconv/vector.ll
Removed:
################################################################################
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
index b66874e6234d..8bf6cb514144 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
@@ -2359,32 +2359,34 @@ SDValue SelectionDAGLegalize::ExpandLegalINT_TO_FP(SDNode *Node,
// Get the stack frame index of a 8 byte buffer.
SDValue StackSlot = DAG.CreateStackTemporary(MVT::f64);
- // set up Hi and Lo (into buffer) address based on endian
- SDValue Hi = StackSlot;
- SDValue Lo = DAG.getMemBasePlusOffset(StackSlot, 4, dl);
- if (DAG.getDataLayout().isLittleEndian())
- std::swap(Hi, Lo);
-
+ SDValue Lo = Op0;
// if signed map to unsigned space
- SDValue Op0Mapped;
if (isSigned) {
- // constant used to invert sign bit (signed to unsigned mapping)
- SDValue SignBit = DAG.getConstant(0x80000000u, dl, MVT::i32);
- Op0Mapped = DAG.getNode(ISD::XOR, dl, MVT::i32, Op0, SignBit);
- } else {
- Op0Mapped = Op0;
+ // Invert sign bit (signed to unsigned mapping).
+ Lo = DAG.getNode(ISD::XOR, dl, MVT::i32, Lo,
+ DAG.getConstant(0x80000000u, dl, MVT::i32));
}
- // store the lo of the constructed double - based on integer input
- SDValue Store1 = DAG.getStore(DAG.getEntryNode(), dl, Op0Mapped, Lo,
+ // Initial hi portion of constructed double.
+ SDValue Hi = DAG.getConstant(0x43300000u, dl, MVT::i32);
+
+ // If this a big endian target, swap the lo and high data.
+ if (DAG.getDataLayout().isBigEndian())
+ std::swap(Lo, Hi);
+
+ SDValue MemChain = DAG.getEntryNode();
+
+ // Store the lo of the constructed double.
+ SDValue Store1 = DAG.getStore(MemChain, dl, Lo, StackSlot,
MachinePointerInfo());
- // initial hi portion of constructed double
- SDValue InitialHi = DAG.getConstant(0x43300000u, dl, MVT::i32);
- // store the hi of the constructed double - biased exponent
+ // Store the hi of the constructed double.
+ SDValue HiPtr = DAG.getMemBasePlusOffset(StackSlot, 4, dl);
SDValue Store2 =
- DAG.getStore(Store1, dl, InitialHi, Hi, MachinePointerInfo());
+ DAG.getStore(MemChain, dl, Hi, HiPtr, MachinePointerInfo());
+ MemChain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Store1, Store2);
+
// load the constructed double
SDValue Load =
- DAG.getLoad(MVT::f64, dl, Store2, StackSlot, MachinePointerInfo());
+ DAG.getLoad(MVT::f64, dl, MemChain, StackSlot, MachinePointerInfo());
// FP constant to bias correct the final result
SDValue Bias = DAG.getConstantFP(isSigned ?
BitsToDouble(0x4330000080000000ULL) :
diff --git a/llvm/test/CodeGen/Mips/cconv/vector.ll b/llvm/test/CodeGen/Mips/cconv/vector.ll
index 4a1f9cb6a6a9..071949d7b9e1 100644
--- a/llvm/test/CodeGen/Mips/cconv/vector.ll
+++ b/llvm/test/CodeGen/Mips/cconv/vector.ll
@@ -6227,10 +6227,10 @@ define <4 x float> @mixed_32(<4 x float> %a, i32 %b) {
; MIPS32EB: # %bb.0: # %entry
; MIPS32EB-NEXT: addiu $sp, $sp, -8
; MIPS32EB-NEXT: .cfi_def_cfa_offset 8
-; MIPS32EB-NEXT: lui $1, 17200
-; MIPS32EB-NEXT: sw $1, 0($sp)
; MIPS32EB-NEXT: lw $1, 32($sp)
; MIPS32EB-NEXT: sw $1, 4($sp)
+; MIPS32EB-NEXT: lui $1, 17200
+; MIPS32EB-NEXT: sw $1, 0($sp)
; MIPS32EB-NEXT: lui $1, %hi($CPI41_0)
; MIPS32EB-NEXT: ldc1 $f0, %lo($CPI41_0)($1)
; MIPS32EB-NEXT: ldc1 $f2, 0($sp)
@@ -6302,10 +6302,10 @@ define <4 x float> @mixed_32(<4 x float> %a, i32 %b) {
; MIPS32R5EB: # %bb.0: # %entry
; MIPS32R5EB-NEXT: addiu $sp, $sp, -8
; MIPS32R5EB-NEXT: .cfi_def_cfa_offset 8
-; MIPS32R5EB-NEXT: lui $1, 17200
-; MIPS32R5EB-NEXT: sw $1, 0($sp)
; MIPS32R5EB-NEXT: lw $1, 32($sp)
; MIPS32R5EB-NEXT: sw $1, 4($sp)
+; MIPS32R5EB-NEXT: lui $1, 17200
+; MIPS32R5EB-NEXT: sw $1, 0($sp)
; MIPS32R5EB-NEXT: lui $1, %hi($CPI41_0)
; MIPS32R5EB-NEXT: ldc1 $f0, %lo($CPI41_0)($1)
; MIPS32R5EB-NEXT: ldc1 $f1, 0($sp)
@@ -6498,16 +6498,16 @@ define <4 x float> @cast(<4 x i32> %a) {
; MIPS32EB: # %bb.0: # %entry
; MIPS32EB-NEXT: addiu $sp, $sp, -32
; MIPS32EB-NEXT: .cfi_def_cfa_offset 32
-; MIPS32EB-NEXT: lw $1, 52($sp)
+; MIPS32EB-NEXT: lw $1, 48($sp)
; MIPS32EB-NEXT: lui $2, 17200
+; MIPS32EB-NEXT: lw $3, 52($sp)
+; MIPS32EB-NEXT: sw $3, 28($sp)
; MIPS32EB-NEXT: sw $2, 24($sp)
-; MIPS32EB-NEXT: sw $1, 28($sp)
-; MIPS32EB-NEXT: lw $1, 48($sp)
-; MIPS32EB-NEXT: sw $2, 16($sp)
; MIPS32EB-NEXT: sw $1, 20($sp)
+; MIPS32EB-NEXT: sw $2, 16($sp)
; MIPS32EB-NEXT: lui $1, %hi($CPI42_0)
-; MIPS32EB-NEXT: sw $2, 8($sp)
; MIPS32EB-NEXT: sw $7, 12($sp)
+; MIPS32EB-NEXT: sw $2, 8($sp)
; MIPS32EB-NEXT: ldc1 $f0, %lo($CPI42_0)($1)
; MIPS32EB-NEXT: ldc1 $f2, 24($sp)
; MIPS32EB-NEXT: sub.d $f2, $f2, $f0
@@ -6521,8 +6521,8 @@ define <4 x float> @cast(<4 x i32> %a) {
; MIPS32EB-NEXT: swc1 $f2, 12($4)
; MIPS32EB-NEXT: swc1 $f4, 8($4)
; MIPS32EB-NEXT: swc1 $f6, 4($4)
-; MIPS32EB-NEXT: sw $2, 0($sp)
; MIPS32EB-NEXT: sw $6, 4($sp)
+; MIPS32EB-NEXT: sw $2, 0($sp)
; MIPS32EB-NEXT: ldc1 $f2, 0($sp)
; MIPS32EB-NEXT: sub.d $f0, $f2, $f0
; MIPS32EB-NEXT: cvt.s.d $f0, $f0
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