[PATCH] D80052: [docs] Sketch outline for HowToUpdateDebugInfo.rst

[Jeremy Morse via Phabricator via llvm-commits]

jmorse added a comment.

This is going to be highly useful, thanks for kicking it off. Other topics we might want to cover:

- What to do when mutating instructions -- we saw that happen in PR45889.
- Control flow changes -- we probably want to prescribe that if one jump threads, duplicates or erases blocks, then the same sequence of debug intrinsics is seen on each program path as before. (Or otherwise, what to do in those scenarios).

Plus: how to update DebugLocs / line-numbers. These could be in their own top level section, or documented alongside the IR transforms. (I've no opinion on which).



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Comment at: llvm/docs/HowToUpdateDebugInfo.rst:232
+   be precise enough), moving the test to its own file is preferred.
+
+MIR-level transformations
----------------
djtodoro wrote:
> vsk wrote:
> > aprantl wrote:
> > > Do we want to add a section on SelectionDAG & GlobalISel, DAGCombine, etc?
> > The info about MIR should generally carry over to GIsel. This probably does need a separate section for SelectionDAG, but I'm not sure how to structure that, so I'll leave it as TODO as well.
> I guess we can add TODOs for the sections on VirtRegRewriter/LiveDebugVariables; LiveDebugValues; AsmPrinter(DwarfDebug;DwarfExpression); as well.
My feeling is that the debug specific passes are best documented in SourceLevelDebugging.rst instead -- with this document focused on how optimisation writers should use LLVM APIs to preserve debug info in their passes.

The isel passes kind of fall into both those categories -- there's debug updating occurring, but lots of unrelated implementation details too.


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