[PATCH] D79876: [llvm][sve] Intrinsics for SVE sudot and usdot instructions.

[Sander de Smalen via Phabricator via llvm-commits]

sdesmalen added inline comments.


================
Comment at: llvm/lib/Target/AArch64/SVEInstrFormats.td:7627
+
+  def : Pat<(nxv4i32 (op (nxv4i32 ZPR32:$Zda), (nxv16i8 ZPR8:$Zn), (nxv16i8 ZPR8:$Zm))),
+            (!cast<Instruction>(NAME) ZPR32:$Zda, ZPR8:$Zn, ZPR8:$Zm)>;
----------------
Please use SVE_3_Op_Pat for this pattern.


================
Comment at: llvm/lib/Target/AArch64/SVEInstrFormats.td:7658
+
+  def : Pat<(nxv4i32 (op (nxv4i32 ZPR32:$Zda), (nxv16i8 ZPR8:$Zn), (nxv16i8 ZPR8:$Zm), VectorIndexS32b_timm:$imm)),
+            (!cast<Instruction>(NAME) ZPR32:$Zda, ZPR8:$Zn, ZPR8:$Zm, VectorIndexS32b_timm:$imm)>;
----------------
This pattern can use `SVE_3_Op_Imm_Pat`


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D79876/new/

https://reviews.llvm.org/D79876