[llvm] 782a4dd - [PowerPC] Use add instead of addReg in ppc-early-ret pass

Kang Zhang via llvm-commits llvm-commits at lists.llvm.org
Tue May 12 23:00:37 PDT 2020


Author: Kang Zhang
Date: 2020-05-13T05:59:52Z
New Revision: 782a4dd1a478e41857744b483b104b5e66857fbf

URL: https://github.com/llvm/llvm-project/commit/782a4dd1a478e41857744b483b104b5e66857fbf
DIFF: https://github.com/llvm/llvm-project/commit/782a4dd1a478e41857744b483b104b5e66857fbf.diff

LOG: [PowerPC] Use add instead of addReg in ppc-early-ret pass

Summary:
The ppc-early-ret pass use the addReg() to add operand to the new
instruction, it can't reserve the flag of old operand. This has caused
machine verfications failed.
This patch use add() to instead of addReg().

Reviewed By: steven.zhang

Differential Revision: https://reviews.llvm.org/D77997

Added: 
    

Modified: 
    llvm/lib/Target/PowerPC/PPCEarlyReturn.cpp
    llvm/test/CodeGen/PowerPC/early-ret-verify.mir
    llvm/test/CodeGen/PowerPC/early-ret.mir

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/PowerPC/PPCEarlyReturn.cpp b/llvm/lib/Target/PowerPC/PPCEarlyReturn.cpp
index aa5d830b549e..c9f74bbf861c 100644
--- a/llvm/lib/Target/PowerPC/PPCEarlyReturn.cpp
+++ b/llvm/lib/Target/PowerPC/PPCEarlyReturn.cpp
@@ -90,8 +90,8 @@ namespace {
               // This is a conditional branch to the return. Replace the branch
               // with a bclr.
               BuildMI(**PI, J, J->getDebugLoc(), TII->get(PPC::BCCLR))
-                  .addImm(J->getOperand(0).getImm())
-                  .addReg(J->getOperand(1).getReg())
+                  .add(J->getOperand(0))
+                  .add(J->getOperand(1))
                   .copyImplicitOps(*I);
               MachineBasicBlock::iterator K = J--;
               K->eraseFromParent();
@@ -106,7 +106,7 @@ namespace {
               BuildMI(
                   **PI, J, J->getDebugLoc(),
                   TII->get(J->getOpcode() == PPC::BC ? PPC::BCLR : PPC::BCLRn))
-                  .addReg(J->getOperand(0).getReg())
+                  .add(J->getOperand(0))
                   .copyImplicitOps(*I);
               MachineBasicBlock::iterator K = J--;
               K->eraseFromParent();

diff  --git a/llvm/test/CodeGen/PowerPC/early-ret-verify.mir b/llvm/test/CodeGen/PowerPC/early-ret-verify.mir
index 1d316020ec3e..5a01aa4effa5 100644
--- a/llvm/test/CodeGen/PowerPC/early-ret-verify.mir
+++ b/llvm/test/CodeGen/PowerPC/early-ret-verify.mir
@@ -1,5 +1,5 @@
 # RUN: llc -mtriple powerpc64le-unknown-linux-gnu -run-pass=ppc-early-ret -o \
-# RUN:   - %s | FileCheck %s
+# RUN:   - %s -verify-machineinstrs | FileCheck %s
 
 ---
 name:            testEarlyRet
@@ -40,7 +40,7 @@ body:             |
 
   ; CHECK-LABEL: testEarlyRet
   ; CHECK: bb.0.entry:
-  ; CHECK:   BCLR $cr5lt, implicit $lr, implicit $rm, implicit $lr, implicit $rm
+  ; CHECK:   BCLR undef renamable $cr5lt, implicit $lr, implicit $rm, implicit $lr, implicit $rm
   ; CHECK: bb.1:
   ; CHECK:   renamable $r3 = IMPLICIT_DEF
   ; CHECK:   renamable $r4 = IMPLICIT_DEF

diff  --git a/llvm/test/CodeGen/PowerPC/early-ret.mir b/llvm/test/CodeGen/PowerPC/early-ret.mir
index f534fd0e2702..bfbaa8edeb97 100644
--- a/llvm/test/CodeGen/PowerPC/early-ret.mir
+++ b/llvm/test/CodeGen/PowerPC/early-ret.mir
@@ -65,7 +65,7 @@ body:             |
   ; CHECK-LABEL: name: testBCLRn
   ; CHECK: bb.0.entry:
   ; CHECK:   renamable $cr0 = FCMPUS killed renamable $f3, killed renamable $f4
-  ; CHECK:   BCLRn $cr0eq, implicit $lr, implicit $rm, implicit killed $v2
+  ; CHECK:   BCLRn killed renamable $cr0eq, implicit $lr, implicit $rm, implicit killed $v2
   ; CHECK: bb.1.entry:
   ; CHECK:   renamable $cr0 = FCMPUS killed renamable $f1, killed renamable $f2
   ; CHECK:   BCLR killed renamable $cr0eq, implicit $lr, implicit $rm, implicit killed $v2
@@ -106,7 +106,7 @@ body:             |
   ; CHECK-LABEL: name: testBCLR
   ; CHECK: bb.0.entry:
   ; CHECK:   renamable $cr0 = FCMPUS killed renamable $f3, killed renamable $f4
-  ; CHECK:   BCLR $cr0eq, implicit $lr, implicit $rm, implicit $lr, implicit $rm, implicit killed $v2
+  ; CHECK:   BCLR killed renamable $cr0eq, implicit $lr, implicit $rm, implicit $lr, implicit $rm, implicit killed $v2
   ; CHECK: bb.1.entry:
   ; CHECK:   renamable $cr0 = FCMPUS killed renamable $f1, killed renamable $f2
   ; CHECK:   BCLRn killed renamable $cr0eq, implicit $lr, implicit $rm, implicit killed $v2
@@ -137,10 +137,10 @@ body:             |
 
   ; CHECK-LABEL: name: testBCCLR
   ; CHECK: bb.0.entry:
-  ; CHECK: renamable $r4 = LI 0
-  ; CHECK: renamable $cr0 = CMPLWI killed renamable $r4, 0
-  ; CHECK: BCCLR 68, $cr0, implicit $lr, implicit $rm, implicit $lr, implicit $rm
+  ; CHECK:   renamable $r4 = LI 0
+  ; CHECK:   renamable $cr0 = CMPLWI killed renamable $r4, 0
+  ; CHECK:   BCCLR 68, renamable $cr0, implicit $lr, implicit $rm, implicit $lr, implicit $rm
   ; CHECK: bb.1:
-  ; CHECK: BCCLR 68, $cr0, implicit $lr, implicit $rm, implicit $lr, implicit $rm
-  ; CHECK: BLR implicit $lr, implicit $rm
+  ; CHECK:   BCCLR 68, killed renamable $cr0, implicit $lr, implicit $rm, implicit $lr, implicit $rm
+  ; CHECK:   BLR implicit $lr, implicit $rm
 ...


        


More information about the llvm-commits mailing list