[PATCH] D78471: [x86/SLH] Pin function address in physical register after it been hardened.

Pengfei Wang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue May 12 18:52:49 PDT 2020


pengfei added a comment.

In D78471#2032415 <https://reviews.llvm.org/D78471#2032415>, @craig.topper wrote:

> Is the problem here really that foldMemoryOperand doesn't know to preserve the post instr symbol?


Yes and no. It's the problem I wanted to fix firstly. But after I read the code of hardening, I think the spill is also a problem. Because that pass always load the function address to register at the beginning. I think the spilling violates the objective the pass does. Beside, according to calling conversation, there are volatile registers before calling. So I think it's not a cost if we pin the address register.


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