[PATCH] D76042: [PowerPC] Add the Uses of implicit register for the BCLRn instruction

Zhang Kang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon May 11 03:10:58 PDT 2020


ZhangKang marked 2 inline comments as done.
ZhangKang added inline comments.


================
Comment at: llvm/lib/Target/PowerPC/PPCEarlyReturn.cpp:95
-                  .addReg(J->getOperand(1).getReg())
-                  .copyImplicitOps(*I);
               MachineBasicBlock::iterator K = J--;
----------------
steven.zhang wrote:
> I still have concern on expand the BuildMI here. If it is the problem of copyImplicitOps, we need to add some new API or extend it to support the merge. And I don't think your new solution fix this issue as where is the implicit operands of BCCLR ?
The new patch has used `setDesc` to avoid using the `copyImplicitOps`.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D76042/new/

https://reviews.llvm.org/D76042





More information about the llvm-commits mailing list