[llvm] 24b3c2d - [BreakFalseDeps] Harden pickBestRegisterForUndef against changing tied operands or physical registers that aren't renamable.

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2020-05-09T15:37:31-07:00
New Revision: 24b3c2d0585f2f96574e9819313ab05e8943ee02

URL: https://github.com/llvm/llvm-project/commit/24b3c2d0585f2f96574e9819313ab05e8943ee02
DIFF: https://github.com/llvm/llvm-project/commit/24b3c2d0585f2f96574e9819313ab05e8943ee02.diff

LOG: [BreakFalseDeps] Harden pickBestRegisterForUndef against changing tied operands or physical registers that aren't renamable.

I don't have any test cases since X86 doesn't return any tied
operands from getUndefRegClearance today. But conceivably we could
want BreakFalseDeps to insert a dependency breaking XOR for
a tied operand in the future.

Added: 
    

Modified: 
    llvm/lib/CodeGen/BreakFalseDeps.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/CodeGen/BreakFalseDeps.cpp b/llvm/lib/CodeGen/BreakFalseDeps.cpp
index 9bae9d36add1..b01a264dd97d 100644
--- a/llvm/lib/CodeGen/BreakFalseDeps.cpp
+++ b/llvm/lib/CodeGen/BreakFalseDeps.cpp
@@ -106,9 +106,18 @@ FunctionPass *llvm::createBreakFalseDeps() { return new BreakFalseDeps(); }
 
 bool BreakFalseDeps::pickBestRegisterForUndef(MachineInstr *MI, unsigned OpIdx,
   unsigned Pref) {
+
+  // We can't change tied operands.
+  if (MI->isRegTiedToDefOperand(OpIdx))
+    return false;
+
   MachineOperand &MO = MI->getOperand(OpIdx);
   assert(MO.isUndef() && "Expected undef machine operand");
 
+  // We can't change registers that aren't renamable.
+  if (!MO.isRenamable())
+    return false;
+
   Register OriginalReg = MO.getReg();
 
   // Update only undef operands that have reg units that are mapped to one root.