[llvm] f4d4e24 - [X86] Remove mul(abs(x),abs(x)) -> mul(x,x) tests

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2020-05-09T15:07:15+01:00
New Revision: f4d4e246e0ea137c759632a51b4ca043ed4f27f2

URL: https://github.com/llvm/llvm-project/commit/f4d4e246e0ea137c759632a51b4ca043ed4f27f2
DIFF: https://github.com/llvm/llvm-project/commit/f4d4e246e0ea137c759632a51b4ca043ed4f27f2.diff

LOG: [X86] Remove mul(abs(x),abs(x)) -> mul(x,x) tests

This is handled in InstCombine (D79319) and its unlikely that these can occur in DAG (see D79304).

Added: 
    

Modified: 
    llvm/test/CodeGen/X86/combine-mul.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/X86/combine-mul.ll b/llvm/test/CodeGen/X86/combine-mul.ll
index 3282d5085592..6ad08ea0c5c7 100644
--- a/llvm/test/CodeGen/X86/combine-mul.ll
+++ b/llvm/test/CodeGen/X86/combine-mul.ll
@@ -283,77 +283,6 @@ define <4 x i32> @combine_vec_mul_add(<4 x i32> %x) {
   ret <4 x i32> %2
 }
 
-; TODO fold mul(abs(x),abs(x)) -> mul(x,x)
-
-define i31 @combine_mul_abs_i31(i31 %0) {
-; SSE-LABEL: combine_mul_abs_i31:
-; SSE:       # %bb.0:
-; SSE-NEXT:    addl %edi, %edi
-; SSE-NEXT:    sarl %edi
-; SSE-NEXT:    movl %edi, %eax
-; SSE-NEXT:    negl %eax
-; SSE-NEXT:    cmovll %edi, %eax
-; SSE-NEXT:    imull %eax, %eax
-; SSE-NEXT:    retq
-;
-; AVX-LABEL: combine_mul_abs_i31:
-; AVX:       # %bb.0:
-; AVX-NEXT:    addl %edi, %edi
-; AVX-NEXT:    sarl %edi
-; AVX-NEXT:    movl %edi, %eax
-; AVX-NEXT:    negl %eax
-; AVX-NEXT:    cmovll %edi, %eax
-; AVX-NEXT:    imull %eax, %eax
-; AVX-NEXT:    retq
-  %c = icmp slt i31 %0, 0
-  %s = sub nsw i31 0, %0
-  %r = select i1 %c, i31 %s, i31 %0
-  %m = mul i31 %r, %r
-  ret i31 %m
-}
-
-define i32 @combine_mul_abs_i32(i32 %0) {
-; SSE-LABEL: combine_mul_abs_i32:
-; SSE:       # %bb.0:
-; SSE-NEXT:    movl %edi, %eax
-; SSE-NEXT:    negl %eax
-; SSE-NEXT:    cmovll %edi, %eax
-; SSE-NEXT:    imull %eax, %eax
-; SSE-NEXT:    retq
-;
-; AVX-LABEL: combine_mul_abs_i32:
-; AVX:       # %bb.0:
-; AVX-NEXT:    movl %edi, %eax
-; AVX-NEXT:    negl %eax
-; AVX-NEXT:    cmovll %edi, %eax
-; AVX-NEXT:    imull %eax, %eax
-; AVX-NEXT:    retq
-  %c = icmp slt i32 %0, 0
-  %s = sub nsw i32 0, %0
-  %r = select i1 %c, i32 %s, i32 %0
-  %m = mul i32 %r, %r
-  ret i32 %m
-}
-
-define <4 x i32> @combine_mul_abs_v4i32(<4 x i32> %0) {
-; SSE-LABEL: combine_mul_abs_v4i32:
-; SSE:       # %bb.0:
-; SSE-NEXT:    pabsd %xmm0, %xmm0
-; SSE-NEXT:    pmulld %xmm0, %xmm0
-; SSE-NEXT:    retq
-;
-; AVX-LABEL: combine_mul_abs_v4i32:
-; AVX:       # %bb.0:
-; AVX-NEXT:    vpabsd %xmm0, %xmm0
-; AVX-NEXT:    vpmulld %xmm0, %xmm0, %xmm0
-; AVX-NEXT:    retq
-  %c = icmp slt <4 x i32> %0, zeroinitializer
-  %s = sub nsw <4 x i32> zeroinitializer, %0
-  %r = select <4 x i1> %c, <4 x i32> %s, <4 x i32> %0
-  %m = mul <4 x i32> %r, %r
-  ret <4 x i32> %m
-}
-
 ; TODO fold Y = sra (X, size(X)-1); mul (or (Y, 1), X) -> (abs X)
 
 define <16 x i8> @combine_mul_to_abs_v16i8(<16 x i8> %x) {