[PATCH] D78319: [GlobalISel][InlineAsm] Add support for basic input operand constraints

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri May 8 08:33:04 PDT 2020


arsenm added inline comments.


================
Comment at: llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp:451
+                          << OpInfo.ConstraintCode << "'\n");
+
+        return false;
----------------
Extra newline


================
Comment at: llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp:460
+            << "Couldn't allocate input register for register constraint\n");
+
+        return false;
----------------
Extra newline


================
Comment at: llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp:473
+                             "not supported yet\n");
+      }
+
----------------
Missing return false?


================
Comment at: llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp:574-575
+      LLT Ty = getLLTForType(*Val->getType(), MIRBuilder.getDataLayout());
+      unsigned ExtOpc =
+          Ty.isByteSized() ? TargetOpcode::G_SEXT : TargetOpcode::G_ZEXT;
+      int64_t ExtVal = ExtOpc == TargetOpcode::G_SEXT ? CI->getSExtValue()
----------------
Changing the extension type based on the byte-sizedness doesn't really make sense to me


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D78319/new/

https://reviews.llvm.org/D78319





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