[PATCH] D79316: [CodeGen] Make logic of resultsCompatible clearer

Eli Friedman via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon May 4 16:09:25 PDT 2020


efriedma added a comment.

Maybe it would be more straightforward to use `CCValAssign::getExtraInfo()`?  Either way is fine, I guess.



================
Comment at: llvm/lib/CodeGen/CallingConvLower.cpp:284
+    if (Loc1.isRegLoc() && Loc2.isRegLoc()) {
+      if (Loc1.getLocReg() != Loc2.getLocReg()) {
         return false;
----------------
Don't need braces on innermost if.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D79316/new/

https://reviews.llvm.org/D79316





More information about the llvm-commits mailing list