[PATCH] D79362: [AMDGPU] Fix FoldImmediate for 16 bit operand

Mon May 4 14:00:16 PDT 2020

arsenm added inline comments.

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Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:2514
+    Register SrcReg = UseMI.getOperand(1).getReg();
+    bool Is16Bit = getOpSize(UseMI, 0) == 2 || getOpSize(UseMI, 1) == 2;
+    bool isVGPRCopy = RI.isVGPR(*MRI, DstReg);
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I think just checking op 0 is sufficient

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Comment at: llvm/test/CodeGen/AMDGPU/fold_16bit_imm.mir:1
+# RUN: llc -mtriple=amdgcn--amdhsa -mcpu=gfx908 -verify-machineinstrs -run-pass peephole-opt -o - %s | FileCheck -check-prefix=GCN %s
+
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Probably should generate these checks

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Comment at: llvm/test/CodeGen/AMDGPU/fold_16bit_imm.mir:12
+    %1:sgpr_lo16 = COPY killed %0.lo16
+
+...
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Adding a use instruction for all of these wouldn't hurt in case peephole-opt ever decides to prune dead instructions

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Comment at: llvm/test/CodeGen/AMDGPU/fold_16bit_imm.mir:109
+
+...
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Needs test with skipped hi16

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D79362/new/

https://reviews.llvm.org/D79362