[PATCH] D79003: [DAG] Add SimplifyDemandedVectorElts binop SimplifyMultipleUseDemandedBits handling

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/test/CodeGen/AArch64/mul_by_elt.ll:145
   ret <4 x float> %mul2
 }
 
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RKSimon wrote:
> Not sure about this change - it strips the first shufflevector entirely losing the multiply by scalar, but instcombine would have done something similar anyhow:
> ```
> define <4 x float> @splat0_before_fmul_fmul_constant(<4 x float> %a) {
>   %1 = fmul <4 x float> %a, <float 3.000000e+00, float undef, float undef, float undef>
>   %2 = fmul <4 x float> %1, <float 6.000000e+00, float undef, float undef, float undef>
>   %mul2 = shufflevector <4 x float> %2, <4 x float> undef, <4 x i32> zeroinitializer
>   ret <4 x float> %mul2
> }
> ```
Why does "multiple use" come into play here?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D79003/new/

https://reviews.llvm.org/D79003