[llvm] 43b0e44 - [InstCombine] add test for faulty cttz fold (PR45762); NFC

[Sanjay Patel via llvm-commits]

Author: Sanjay Patel
Date: 2020-05-01T13:52:23-04:00
New Revision: 43b0e446fb18b9923a9b268da16693419c616972

URL: https://github.com/llvm/llvm-project/commit/43b0e446fb18b9923a9b268da16693419c616972
DIFF: https://github.com/llvm/llvm-project/commit/43b0e446fb18b9923a9b268da16693419c616972.diff

LOG: [InstCombine] add test for faulty cttz fold (PR45762); NFC

Added: 
    

Modified: 
    llvm/test/Transforms/InstCombine/select-ctlz-to-cttz.ll

Removed: 
    


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diff  --git a/llvm/test/Transforms/InstCombine/select-ctlz-to-cttz.ll b/llvm/test/Transforms/InstCombine/select-ctlz-to-cttz.ll
index e785ad35e8d6..e0cd667e4cee 100644
--- a/llvm/test/Transforms/InstCombine/select-ctlz-to-cttz.ll
+++ b/llvm/test/Transforms/InstCombine/select-ctlz-to-cttz.ll
@@ -1,7 +1,7 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt -instcombine -S < %s | FileCheck %s
 
-
+declare i3 @llvm.cttz.i3(i3, i1)
 declare i32 @llvm.cttz.i32(i32, i1 immarg)
 declare i32 @llvm.ctlz.i32(i32, i1 immarg)
 declare i64 @llvm.cttz.i64(i64, i1 immarg)
@@ -217,3 +217,33 @@ define <2 x i32> @select_clz_to_ctz_vec_with_undef(<2 x i32> %a) {
   %cond = select <2 x i1> %tobool, <2 x i32> %lz, <2 x i32> %sub1
   ret <2 x i32> %cond
 }
+
+define i4 @PR45762(i3 %x4) {
+; CHECK-LABEL: @PR45762(
+; CHECK-NEXT:    [[T4:%.*]] = call i3 @llvm.cttz.i3(i3 [[X4:%.*]], i1 true), !range !2
+; CHECK-NEXT:    [[T7:%.*]] = zext i3 [[T4]] to i4
+; CHECK-NEXT:    [[ONE_HOT_16:%.*]] = shl i4 1, [[T7]]
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp eq i3 [[X4]], 0
+; CHECK-NEXT:    [[NARROW:%.*]] = select i1 [[TMP1]], i3 0, i3 [[T4]]
+; CHECK-NEXT:    [[UMUL_23:%.*]] = zext i3 [[NARROW]] to i4
+; CHECK-NEXT:    [[SEL_71:%.*]] = shl i4 [[ONE_HOT_16]], [[UMUL_23]]
+; CHECK-NEXT:    ret i4 [[SEL_71]]
+;
+  %t4 = call i3 @llvm.cttz.i3(i3 %x4, i1 false)
+  %t5 = icmp eq i3 %x4, 0
+  %t6 = select i1 %t5, i3 3, i3 %t4
+  %t7 = zext i3 %t6 to i4
+  %one_hot_16 = shl i4 1, %t7
+  %t8 = lshr i4 %one_hot_16, 0
+  %bit_slice_61 = trunc i4 %t8 to i1
+  %t9 = lshr i4 %one_hot_16, 1
+  %bit_slice_62 = trunc i4 %t9 to i1
+  %t10 = lshr i4 %one_hot_16, 2
+  %bit_slice_64 = trunc i4 %t10 to i1
+  %t11 = or i1 %bit_slice_61, %bit_slice_62
+  %or_69 = or i1 %t11, %bit_slice_64
+  %umul_23 = mul i4 %one_hot_16, %one_hot_16
+  %t12 = icmp eq i1 %or_69, false
+  %sel_71 = select i1 %t12, i4 %one_hot_16, i4 %umul_23
+  ret i4 %sel_71
+}