[PATCH] D78986: [PowerPC-QPX] adjust operands order of qpx vector fma instructions.

ChenZheng via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Apr 28 22:38:51 PDT 2020


shchenz marked 2 inline comments as done.
shchenz added a comment.

Thanks for your quick review. Patch updated.



================
Comment at: llvm/lib/Target/PowerPC/PPCInstrQPX.td:179
                         [(set v4f32:$FRT, (fma v4f32:$FRA, v4f32:$FRC, v4f32:$FRB))]>;
   def QVFNMADD : AForm_1<4, 31,
                       (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB, qfrc:$FRC),
----------------
steven.zhang wrote:
> So what about the QVFNMADD ?  And it would be great if you could post the ISA definition of QPX FMA instruction here.
QVFNMADD should have same issue. I already add it together with msub related opcodes.

Here is QPX ISA (May 9, 2012) says about QVFMADD:
```
4.4.2 Quad-Vector Floating-Point Multiply-Add Instructions

qvfmadds QRT,QRA,QRC,QRB

The operations are performed:
QRT0 ← [(QRA0)×(QRC0)] + (QRB0) 
QRT1 ← [(QRA1)×(QRC1)] + (QRB1) 
QRT2 ← [(QRA2)×(QRC2)] + (QRB2) 
QRT3 ← [(QRA3)×(QRC3)] + (QRB3)
```


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D78986/new/

https://reviews.llvm.org/D78986





More information about the llvm-commits mailing list