[llvm] b5f8974 - [DAGCombine] Checking the cost directly to improve the code readability
QingShan Zhang via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 28 18:49:57 PDT 2020
Author: QingShan Zhang
Date: 2020-04-29T01:49:39Z
New Revision: b5f89744cca1f12c452b7ce4504bc6fad32eae0e
URL: https://github.com/llvm/llvm-project/commit/b5f89744cca1f12c452b7ce4504bc6fad32eae0e
DIFF: https://github.com/llvm/llvm-project/commit/b5f89744cca1f12c452b7ce4504bc6fad32eae0e.diff
LOG: [DAGCombine] Checking the cost directly to improve the code readability
Call getNegatedExpression(Cost) and check the Cost to make the code more clear.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D78347
Added:
Modified:
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
llvm/test/CodeGen/PowerPC/qpx-recipest.ll
Removed:
################################################################################
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 8edd90aa654b..1a8242abc0f6 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -527,7 +527,6 @@ namespace {
bool isSetCCEquivalent(SDValue N, SDValue &LHS, SDValue &RHS,
SDValue &CC, bool MatchStrict = false) const;
bool isOneUseSetCC(SDValue N) const;
- bool isCheaperToUseNegatedFPOps(SDValue X, SDValue Y);
SDValue SimplifyNodeWithTwoResults(SDNode *N, unsigned LoOp,
unsigned HiOp);
@@ -12616,25 +12615,6 @@ SDValue DAGCombiner::visitFSUB(SDNode *N) {
return SDValue();
}
-/// Return true if both inputs are at least as cheap in negated form and at
-/// least one input is strictly cheaper in negated form.
-bool DAGCombiner::isCheaperToUseNegatedFPOps(SDValue X, SDValue Y) {
- TargetLowering::NegatibleCost LHSNeg =
- TLI.getNegatibleCost(X, DAG, LegalOperations, ForCodeSize);
- if (TargetLowering::NegatibleCost::Expensive == LHSNeg)
- return false;
-
- TargetLowering::NegatibleCost RHSNeg =
- TLI.getNegatibleCost(Y, DAG, LegalOperations, ForCodeSize);
- if (TargetLowering::NegatibleCost::Expensive == RHSNeg)
- return false;
-
- // Both negated operands are at least as cheap as their counterparts.
- // Check to see if at least one is cheaper negated.
- return (TargetLowering::NegatibleCost::Cheaper == LHSNeg ||
- TargetLowering::NegatibleCost::Cheaper == RHSNeg);
-}
-
SDValue DAGCombiner::visitFMUL(SDNode *N) {
SDValue N0 = N->getOperand(0);
SDValue N1 = N->getOperand(1);
@@ -12709,11 +12689,18 @@ SDValue DAGCombiner::visitFMUL(SDNode *N) {
return DAG.getNode(ISD::FNEG, DL, VT, N0);
// -N0 * -N1 --> N0 * N1
- if (isCheaperToUseNegatedFPOps(N0, N1)) {
- SDValue NegN0 = TLI.negateExpression(N0, DAG, LegalOperations, ForCodeSize);
- SDValue NegN1 = TLI.negateExpression(N1, DAG, LegalOperations, ForCodeSize);
+ TargetLowering::NegatibleCost CostN0 =
+ TargetLowering::NegatibleCost::Expensive;
+ TargetLowering::NegatibleCost CostN1 =
+ TargetLowering::NegatibleCost::Expensive;
+ SDValue NegN0 =
+ TLI.getNegatedExpression(N0, DAG, LegalOperations, ForCodeSize, CostN0);
+ SDValue NegN1 =
+ TLI.getNegatedExpression(N1, DAG, LegalOperations, ForCodeSize, CostN1);
+ if (NegN0 && NegN1 &&
+ (CostN0 == TargetLowering::NegatibleCost::Cheaper ||
+ CostN1 == TargetLowering::NegatibleCost::Cheaper))
return DAG.getNode(ISD::FMUL, DL, VT, NegN0, NegN1, Flags);
- }
// fold (fmul X, (select (fcmp X > 0.0), -1.0, 1.0)) -> (fneg (fabs X))
// fold (fmul X, (select (fcmp X > 0.0), 1.0, -1.0)) -> (fabs X)
@@ -12792,11 +12779,18 @@ SDValue DAGCombiner::visitFMA(SDNode *N) {
}
// (-N0 * -N1) + N2 --> (N0 * N1) + N2
- if (isCheaperToUseNegatedFPOps(N0, N1)) {
- SDValue NegN0 = TLI.negateExpression(N0, DAG, LegalOperations, ForCodeSize);
- SDValue NegN1 = TLI.negateExpression(N1, DAG, LegalOperations, ForCodeSize);
+ TargetLowering::NegatibleCost CostN0 =
+ TargetLowering::NegatibleCost::Expensive;
+ TargetLowering::NegatibleCost CostN1 =
+ TargetLowering::NegatibleCost::Expensive;
+ SDValue NegN0 =
+ TLI.getNegatedExpression(N0, DAG, LegalOperations, ForCodeSize, CostN0);
+ SDValue NegN1 =
+ TLI.getNegatedExpression(N1, DAG, LegalOperations, ForCodeSize, CostN1);
+ if (NegN0 && NegN1 &&
+ (CostN0 == TargetLowering::NegatibleCost::Cheaper ||
+ CostN1 == TargetLowering::NegatibleCost::Cheaper))
return DAG.getNode(ISD::FMA, DL, VT, NegN0, NegN1, N2, Flags);
- }
if (UnsafeFPMath) {
if (N0CFP && N0CFP->isZero())
@@ -13061,11 +13055,18 @@ SDValue DAGCombiner::visitFDIV(SDNode *N) {
}
// (fdiv (fneg X), (fneg Y)) -> (fdiv X, Y)
- if (isCheaperToUseNegatedFPOps(N0, N1)) {
- SDValue Neg0 = TLI.negateExpression(N0, DAG, LegalOperations, ForCodeSize);
- SDValue Neg1 = TLI.negateExpression(N1, DAG, LegalOperations, ForCodeSize);
- return DAG.getNode(ISD::FDIV, SDLoc(N), VT, Neg0, Neg1, Flags);
- }
+ TargetLowering::NegatibleCost CostN0 =
+ TargetLowering::NegatibleCost::Expensive;
+ TargetLowering::NegatibleCost CostN1 =
+ TargetLowering::NegatibleCost::Expensive;
+ SDValue NegN0 =
+ TLI.getNegatedExpression(N0, DAG, LegalOperations, ForCodeSize, CostN0);
+ SDValue NegN1 =
+ TLI.getNegatedExpression(N1, DAG, LegalOperations, ForCodeSize, CostN1);
+ if (NegN0 && NegN1 &&
+ (CostN0 == TargetLowering::NegatibleCost::Cheaper ||
+ CostN1 == TargetLowering::NegatibleCost::Cheaper))
+ return DAG.getNode(ISD::FDIV, SDLoc(N), VT, NegN0, NegN1, Flags);
return SDValue();
}
diff --git a/llvm/test/CodeGen/PowerPC/qpx-recipest.ll b/llvm/test/CodeGen/PowerPC/qpx-recipest.ll
index 2fdaa1fec821..4f3abd2f60d6 100644
--- a/llvm/test/CodeGen/PowerPC/qpx-recipest.ll
+++ b/llvm/test/CodeGen/PowerPC/qpx-recipest.ll
@@ -65,8 +65,8 @@ define <4 x double> @foof_fmf(<4 x double> %a, <4 x float> %b) nounwind {
; CHECK-NEXT: addi 3, 3, .LCPI2_0 at toc@l
; CHECK-NEXT: qvlfsx 0, 0, 3
; CHECK-NEXT: qvfmuls 4, 3, 3
-; CHECK-NEXT: qvfnmsubs 2, 2, 0, 2
-; CHECK-NEXT: qvfmadds 0, 2, 4, 0
+; CHECK-NEXT: qvfmsubs 2, 2, 0, 2
+; CHECK-NEXT: qvfnmsubs 0, 2, 4, 0
; CHECK-NEXT: qvfmuls 0, 3, 0
; CHECK-NEXT: qvfmul 1, 1, 0
; CHECK-NEXT: blr
@@ -182,8 +182,8 @@ define <4 x float> @goo_fmf(<4 x float> %a, <4 x float> %b) nounwind {
; CHECK-NEXT: addi 3, 3, .LCPI6_0 at toc@l
; CHECK-NEXT: qvlfsx 0, 0, 3
; CHECK-NEXT: qvfmuls 4, 3, 3
-; CHECK-NEXT: qvfnmsubs 2, 2, 0, 2
-; CHECK-NEXT: qvfmadds 0, 2, 4, 0
+; CHECK-NEXT: qvfmsubs 2, 2, 0, 2
+; CHECK-NEXT: qvfnmsubs 0, 2, 4, 0
; CHECK-NEXT: qvfmuls 0, 3, 0
; CHECK-NEXT: qvfmuls 1, 1, 0
; CHECK-NEXT: blr
@@ -408,8 +408,8 @@ define <4 x float> @goo3_fmf_denorm_on(<4 x float> %a) #0 {
; CHECK-NEXT: addis 3, 2, .LCPI16_0 at toc@ha
; CHECK-NEXT: addi 3, 3, .LCPI16_0 at toc@l
; CHECK-NEXT: qvfmuls 4, 2, 2
-; CHECK-NEXT: qvfnmsubs 3, 1, 0, 1
-; CHECK-NEXT: qvfmadds 0, 3, 4, 0
+; CHECK-NEXT: qvfmsubs 3, 1, 0, 1
+; CHECK-NEXT: qvfnmsubs 0, 3, 4, 0
; CHECK-NEXT: qvlfsx 3, 0, 3
; CHECK-NEXT: addis 3, 2, .LCPI16_2 at toc@ha
; CHECK-NEXT: addi 3, 3, .LCPI16_2 at toc@l
@@ -435,8 +435,8 @@ define <4 x float> @goo3_fmf_denorm_off(<4 x float> %a) #1 {
; CHECK-NEXT: addis 3, 2, .LCPI17_0 at toc@ha
; CHECK-NEXT: addi 3, 3, .LCPI17_0 at toc@l
; CHECK-NEXT: qvfmuls 4, 2, 2
-; CHECK-NEXT: qvfnmsubs 3, 1, 0, 1
-; CHECK-NEXT: qvfmadds 0, 3, 4, 0
+; CHECK-NEXT: qvfmsubs 3, 1, 0, 1
+; CHECK-NEXT: qvfnmsubs 0, 3, 4, 0
; CHECK-NEXT: qvlfsx 3, 0, 3
; CHECK-NEXT: qvfmuls 0, 2, 0
; CHECK-NEXT: qvfmuls 0, 0, 1
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