[PATCH] D78992: [CodeGen] Add support for inserting elements into scalable vectors

Cullen Rhodes via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Apr 28 08:34:18 PDT 2020


c-rhodes added inline comments.


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Comment at: llvm/test/CodeGen/AArch64/sve-insert-element.ll:6
+; CHECK:       mov [[REG:.*]], #30
+; CHECK:       mov z0.b, p{{.*}}/m, [[REG]]
+  %b = insertelement <vscale x 16 x i8> %a, i8 30, i32 0
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I think it would be better to be a little stricter in the predicate regexs throughout the test and use: `p[0-9]+`. The same applies to Z regs as well in a few places.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D78992/new/

https://reviews.llvm.org/D78992





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