[PATCH] D64830: [Xtensa 4/10] Add basic *td files with Xtensa architecture description.

Jakub Hornáček via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Apr 27 02:38:27 PDT 2020

Previous message: [llvm] 7a07641 - [ARM] Replace hasNoSchedulingInfo with UnsupportedFeatures in the A57 schedule
Next message: [PATCH] D78318: [GlobalISel][InlineAsm] Add support for basic output operand constraints
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

codehippo added a comment.

@andreisfr Has any progress been made on the reverse-engineered Xtensa ISA based on the open-source projects like `gcc` and `binutils`?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D64830/new/

https://reviews.llvm.org/D64830

Previous message: [llvm] 7a07641 - [ARM] Replace hasNoSchedulingInfo with UnsupportedFeatures in the A57 schedule
Next message: [PATCH] D78318: [GlobalISel][InlineAsm] Add support for basic output operand constraints
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

More information about the llvm-commits mailing list