[PATCH] D78887: [VE] Support floating point immediate values

[Kazushi Marukawa via Phabricator via llvm-commits]

kaz7 marked 5 inline comments as done.
kaz7 added inline comments.


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Comment at: llvm/lib/Target/VE/VEInstrInfo.td:100
+  if (M0Flag)
+    Val = countLeadingZeros(Val) | 0x40;
+  else
----------------
simoll wrote:
> Could you document the purpose of this constant with a comment?
Add it.  Thanks.


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Comment at: llvm/lib/Target/VE/VEInstrInfo.td:107
+    const APInt& Imm = N->getValueAPF().bitcastToAPInt();
+    return isMask_64(Imm.getSExtValue()) ||
+           ((Imm.getSExtValue() & (1UL << 63)) &&
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simoll wrote:
> Maybe cache the `Imm.getSExtValue()` result as done above and use that variable instead.
Did it.


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Comment at: llvm/lib/Target/VE/VEInstrInfo.td:456
+               Operand immOp = simm7, Operand mOp = mimm> {
+  defm "" : RRbm<opcStr, opc, RC, Ty, RC, Ty, OpNode, immOp, mOp>;
+}
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simoll wrote:
> same as below
Did it.


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Comment at: llvm/lib/Target/VE/VEInstrInfo.td:465
+                 Operand immOp = simm7, Operand mOp = mimm> {
+  defm "" : RRNCbm<opcStr, opc, RC, Ty, RC, Ty, OpNode, immOp, mOp>;
+}
----------------
simoll wrote:
> I suppose you could write this more naturally as `multiclass RRNCm<...> : RRNCbm<...>;`
Did it.  I've not know how to write it.  Thanks!


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Comment at: llvm/test/CodeGen/VE/fp_mul.ll:97
+; CHECK-NEXT:    or %s11, 0, %s9
+  %r = fmul float %a, 1.175494210692441075487029444849287348827052428745893333857174530571588870475618904265502351336181163787841796875E-38
+  ret float %r
----------------
simoll wrote:
> I guess this is one of those cases where it makes sense to use a fp hex constant: it is shorter and the expected output relates to the bitencoding anyway.
I wish I could.  Recently, llvm is modified to not use hex values in llvm-ir.  After that, llc doesn't accept hex values when I tried to use hex values.  Please let me know if you know how to write it in the current version.  Thanks.


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  https://reviews.llvm.org/D78887/new/

https://reviews.llvm.org/D78887