[PATCH] D78591: [AMDGPU] Define special SGPR subregs

Fri Apr 24 20:34:14 PDT 2020

rampitec marked an inline comment as done.
rampitec added inline comments.

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Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp:269-270
+    Register Low = getSubReg(Reg, AMDGPU::lo16);
+    if (!AMDGPU::SGPR_LO16RegClass.contains(Low))
+      Reserved.set(Low);
+  }
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rampitec wrote:
> arsenm wrote:
> > Add a note that this is because there's no SReg_LO16 at least
> I will add SReg_LO16 and see how it goes. Thanks.
Hm... I have added SReg_LO16 and it went completely off rail with a lot of failed tests, but it did not help VCC liveness as I expected. In fact the liveness problem could occur with any physreg, it is just we never explicitely use something like SGPR0, but we do so with VCC.

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D78591/new/

https://reviews.llvm.org/D78591