[PATCH] D78318: [GlobalISel][InlineAsm] Add support for basic output operand constraints

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Apr 22 08:06:11 PDT 2020


arsenm added inline comments.


================
Comment at: llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp:251
+  TargetLowering::AsmOperandInfoVector TargetConstraints =
+      TLI->ParseConstraints(DL, MF.getSubtarget().getRegisterInfo(), Call);
+
----------------
Add a TRI variable instead of calling getSubtarget().getRegisterInfo() repeatedly through the function


================
Comment at: llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp:693-694
       // regclasses.
-      if (isTargetSpecificOpcode(MI.getOpcode()) && !MI.isPreISelOpcode())
+      if ((isTargetSpecificOpcode(MI.getOpcode()) && !MI.isPreISelOpcode()) ||
+          MI.isInlineAsm())
         continue;
----------------
This part isn't tested, I would leave this for a separate patch. I'm not sure checking for inline asm explicitly is the right thing here


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D78318/new/

https://reviews.llvm.org/D78318





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