[compiler-rt] 5771c98 - [XRay] Change xray_instr_map sled addresses from absolute to PC relative for x86-64

Fangrui Song via llvm-commits llvm-commits at lists.llvm.org
Tue Apr 21 09:36:27 PDT 2020


Author: Fangrui Song
Date: 2020-04-21T09:36:09-07:00
New Revision: 5771c9856249345f09b860fa2b20b762113d521b

URL: https://github.com/llvm/llvm-project/commit/5771c9856249345f09b860fa2b20b762113d521b
DIFF: https://github.com/llvm/llvm-project/commit/5771c9856249345f09b860fa2b20b762113d521b.diff

LOG: [XRay] Change xray_instr_map sled addresses from absolute to PC relative for x86-64

xray_instr_map contains absolute addresses of sleds, which are relocated
by `R_*_RELATIVE` when linked in -pie or -shared mode.

By making these addresses relative to PC, we can avoid the dynamic
relocations and remove the SHF_WRITE flag from xray_instr_map.  We can
thus save VM pages containg xray_instr_map (because they are not
modified).

This patch changes x86-64 and bumps the sled version to 2. Subsequent
changes will change powerpc64le and AArch64.

Reviewed By: dberris, ianlevesque

Differential Revision: https://reviews.llvm.org/D78082

Added: 
    

Modified: 
    compiler-rt/lib/xray/xray_interface.cpp
    compiler-rt/lib/xray/xray_interface_internal.h
    compiler-rt/lib/xray/xray_x86_64.cpp
    llvm/include/llvm/CodeGen/AsmPrinter.h
    llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
    llvm/lib/Target/X86/X86MCInstLower.cpp
    llvm/test/CodeGen/X86/xray-attribute-instrumentation.ll
    llvm/test/CodeGen/X86/xray-log-args.ll
    llvm/test/CodeGen/X86/xray-section-group.ll
    llvm/test/DebugInfo/X86/xray-split-dwarf-interaction.ll

Removed: 
    


################################################################################
diff  --git a/compiler-rt/lib/xray/xray_interface.cpp b/compiler-rt/lib/xray/xray_interface.cpp
index 0d22893eb30f..29dad43b62eb 100644
--- a/compiler-rt/lib/xray/xray_interface.cpp
+++ b/compiler-rt/lib/xray/xray_interface.cpp
@@ -264,14 +264,14 @@ XRayPatchingStatus controlPatching(bool Enable) XRAY_NEVER_INSTRUMENT {
   // now we're assuming we can mprotect the whole section of text between the
   // minimum sled address and the maximum sled address (+ the largest sled
   // size).
-  auto MinSled = InstrMap.Sleds[0];
-  auto MaxSled = InstrMap.Sleds[InstrMap.Entries - 1];
+  auto *MinSled = &InstrMap.Sleds[0];
+  auto *MaxSled = &InstrMap.Sleds[InstrMap.Entries - 1];
   for (std::size_t I = 0; I < InstrMap.Entries; I++) {
     const auto &Sled = InstrMap.Sleds[I];
-    if (Sled.Address < MinSled.Address)
-      MinSled = Sled;
-    if (Sled.Address > MaxSled.Address)
-      MaxSled = Sled;
+    if (Sled.address() < MinSled->address())
+      MinSled = &Sled;
+    if (Sled.address() > MaxSled->address())
+      MaxSled = &Sled;
   }
 
   const size_t PageSize = flags()->xray_page_size_override > 0
@@ -283,9 +283,10 @@ XRayPatchingStatus controlPatching(bool Enable) XRAY_NEVER_INSTRUMENT {
   }
 
   void *PageAlignedAddr =
-      reinterpret_cast<void *>(MinSled.Address & ~(PageSize - 1));
+      reinterpret_cast<void *>(MinSled->address() & ~(PageSize - 1));
   size_t MProtectLen =
-      (MaxSled.Address - reinterpret_cast<uptr>(PageAlignedAddr)) + cSledLength;
+      (MaxSled->address() - reinterpret_cast<uptr>(PageAlignedAddr)) +
+      cSledLength;
   MProtectHelper Protector(PageAlignedAddr, MProtectLen, PageSize);
   if (Protector.MakeWriteable() == -1) {
     Report("Failed mprotect: %d\n", errno);
@@ -337,20 +338,21 @@ XRayPatchingStatus mprotectAndPatchFunction(int32_t FuncId,
   auto SledRange = InstrMap.SledsIndex[FuncId - 1];
   auto *f = SledRange.Begin;
   auto *e = SledRange.End;
-  auto MinSled = *f;
-  auto MaxSled = *(SledRange.End - 1);
+  auto *MinSled = f;
+  auto *MaxSled = (SledRange.End - 1);
   while (f != e) {
-    if (f->Address < MinSled.Address)
-      MinSled = *f;
-    if (f->Address > MaxSled.Address)
-      MaxSled = *f;
+    if (f->address() < MinSled->address())
+      MinSled = f;
+    if (f->address() > MaxSled->address())
+      MaxSled = f;
     ++f;
   }
 
   void *PageAlignedAddr =
-      reinterpret_cast<void *>(MinSled.Address & ~(PageSize - 1));
+      reinterpret_cast<void *>(MinSled->address() & ~(PageSize - 1));
   size_t MProtectLen =
-      (MaxSled.Address - reinterpret_cast<uptr>(PageAlignedAddr)) + cSledLength;
+      (MaxSled->address() - reinterpret_cast<uptr>(PageAlignedAddr)) +
+      cSledLength;
   MProtectHelper Protector(PageAlignedAddr, MProtectLen, PageSize);
   if (Protector.MakeWriteable() == -1) {
     Report("Failed mprotect: %d\n", errno);

diff  --git a/compiler-rt/lib/xray/xray_interface_internal.h b/compiler-rt/lib/xray/xray_interface_internal.h
index 0fea6377648d..2a185973d9f7 100644
--- a/compiler-rt/lib/xray/xray_interface_internal.h
+++ b/compiler-rt/lib/xray/xray_interface_internal.h
@@ -29,6 +29,18 @@ struct XRaySledEntry {
   unsigned char AlwaysInstrument;
   unsigned char Version;
   unsigned char Padding[13]; // Need 32 bytes
+  uint64_t address() const {
+#ifndef __x86_64__
+    // R_MIPS_PC64 does not exist. Use absolute address even for version 2.
+    return Address;
+#else
+    // TODO Eventually all targets but MIPS64 should take this branch.
+    if (Version < 2)
+      return Address;
+    // The target address is relative to the location of the Address variable.
+    return reinterpret_cast<uint64_t>(&Address) + Address;
+#endif
+  }
 #elif SANITIZER_WORDSIZE == 32
   uint32_t Address;
   uint32_t Function;
@@ -36,6 +48,7 @@ struct XRaySledEntry {
   unsigned char AlwaysInstrument;
   unsigned char Version;
   unsigned char Padding[5]; // Need 16 bytes
+  uint32_t address() const { return Address; }
 #else
 #error "Unsupported word size."
 #endif

diff  --git a/compiler-rt/lib/xray/xray_x86_64.cpp b/compiler-rt/lib/xray/xray_x86_64.cpp
index 61a9a88b3bcd..f3742ac71290 100644
--- a/compiler-rt/lib/xray/xray_x86_64.cpp
+++ b/compiler-rt/lib/xray/xray_x86_64.cpp
@@ -151,7 +151,7 @@ bool patchFunctionEntry(const bool Enable, const uint32_t FuncId,
   // opcode and first operand.
   //
   // Prerequisite is to compute the relative offset to the trampoline's address.
-  const uint64_t Address = Sled.Address;
+  const uint64_t Address = Sled.address();
   int64_t TrampolineOffset = reinterpret_cast<int64_t>(Trampoline) -
                              (static_cast<int64_t>(Address) + 11);
   if (TrampolineOffset < MinOffset || TrampolineOffset > MaxOffset) {
@@ -197,7 +197,7 @@ bool patchFunctionExit(const bool Enable, const uint32_t FuncId,
   //
   // Prerequisite is to compute the relative offset fo the
   // __xray_FunctionExit function's address.
-  const uint64_t Address = Sled.Address;
+  const uint64_t Address = Sled.address();
   int64_t TrampolineOffset = reinterpret_cast<int64_t>(__xray_FunctionExit) -
                              (static_cast<int64_t>(Address) + 11);
   if (TrampolineOffset < MinOffset || TrampolineOffset > MaxOffset) {
@@ -225,7 +225,7 @@ bool patchFunctionTailExit(const bool Enable, const uint32_t FuncId,
                            const XRaySledEntry &Sled) XRAY_NEVER_INSTRUMENT {
   // Here we do the dance of replacing the tail call sled with a similar
   // sequence as the entry sled, but calls the tail exit sled instead.
-  const uint64_t Address = Sled.Address;
+  const uint64_t Address = Sled.address();
   int64_t TrampolineOffset =
       reinterpret_cast<int64_t>(__xray_FunctionTailExit) -
       (static_cast<int64_t>(Address) + 11);
@@ -270,12 +270,12 @@ bool patchCustomEvent(const bool Enable, const uint32_t FuncId,
   //
   // ---
   //
-  // In Version 1:
+  // In Version 1 or 2:
   //
   //   The jump offset is now 15 bytes (0x0f), so when restoring the nopw back
   //   to a jmp, use 15 bytes instead.
   //
-  const uint64_t Address = Sled.Address;
+  const uint64_t Address = Sled.address();
   if (Enable) {
     std::atomic_store_explicit(
         reinterpret_cast<std::atomic<uint16_t> *>(Address), NopwSeq,
@@ -283,6 +283,7 @@ bool patchCustomEvent(const bool Enable, const uint32_t FuncId,
   } else {
     switch (Sled.Version) {
     case 1:
+    case 2:
       std::atomic_store_explicit(
           reinterpret_cast<std::atomic<uint16_t> *>(Address), Jmp15Seq,
           std::memory_order_release);
@@ -317,7 +318,7 @@ bool patchTypedEvent(const bool Enable, const uint32_t FuncId,
   // unstashes the registers and returns. If the arguments are already in
   // the correct registers, the stashing and unstashing become equivalently
   // sized nops.
-  const uint64_t Address = Sled.Address;
+  const uint64_t Address = Sled.address();
   if (Enable) {
     std::atomic_store_explicit(
         reinterpret_cast<std::atomic<uint16_t> *>(Address), NopwSeq,

diff  --git a/llvm/include/llvm/CodeGen/AsmPrinter.h b/llvm/include/llvm/CodeGen/AsmPrinter.h
index 67159df7d713..46ddcf15a38e 100644
--- a/llvm/include/llvm/CodeGen/AsmPrinter.h
+++ b/llvm/include/llvm/CodeGen/AsmPrinter.h
@@ -286,7 +286,7 @@ class AsmPrinter : public MachineFunctionPass {
     const class Function *Fn;
     uint8_t Version;
 
-    void emit(int, MCStreamer *, const MCSymbol *) const;
+    void emit(int, MCStreamer *, const MCExpr *, const MCSymbol *) const;
   };
 
   // All the sleds to be emitted.

diff  --git a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
index a95fdeb39148..2b55a39405fe 100644
--- a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
@@ -3188,8 +3188,12 @@ void AsmPrinterHandler::markFunctionEnd() {}
 // describes each instrumentation point.  When XRay patches your code, the index
 // into this table will be given to your handler as a patch point identifier.
 void AsmPrinter::XRayFunctionEntry::emit(int Bytes, MCStreamer *Out,
+                                         const MCExpr *Location,
                                          const MCSymbol *CurrentFnSym) const {
-  Out->emitSymbolValue(Sled, Bytes);
+  if (Location)
+    Out->emitValueImpl(Location, Bytes);
+  else
+    Out->emitSymbolValue(Sled, Bytes);
   Out->emitSymbolValue(CurrentFnSym, Bytes);
   auto Kind8 = static_cast<uint8_t>(Kind);
   Out->emitBinaryData(StringRef(reinterpret_cast<const char *>(&Kind8), 1));
@@ -3209,9 +3213,14 @@ void AsmPrinter::emitXRayTable() {
   const Function &F = MF->getFunction();
   MCSection *InstMap = nullptr;
   MCSection *FnSledIndex = nullptr;
-  if (MF->getSubtarget().getTargetTriple().isOSBinFormatELF()) {
+  const Triple &TT = TM.getTargetTriple();
+  // Version 2 uses a PC-relative address on all supported targets.
+  bool PCRel = TT.isX86();
+  if (TT.isOSBinFormatELF()) {
     auto LinkedToSym = cast<MCSymbolELF>(CurrentFnSym);
-    auto Flags = ELF::SHF_WRITE | ELF::SHF_ALLOC | ELF::SHF_LINK_ORDER;
+    auto Flags = ELF::SHF_ALLOC | ELF::SHF_LINK_ORDER;
+    if (!PCRel)
+      Flags |= ELF::SHF_WRITE;
     StringRef GroupName;
     if (F.hasComdat()) {
       Flags |= ELF::SHF_GROUP;
@@ -3240,8 +3249,17 @@ void AsmPrinter::emitXRayTable() {
   MCSymbol *SledsStart = OutContext.createTempSymbol("xray_sleds_start", true);
   OutStreamer->SwitchSection(InstMap);
   OutStreamer->emitLabel(SledsStart);
-  for (const auto &Sled : Sleds)
-    Sled.emit(WordSizeBytes, OutStreamer.get(), CurrentFnSym);
+  for (const auto &Sled : Sleds) {
+    const MCExpr *Location = nullptr;
+    if (PCRel) {
+      MCSymbol *Dot = OutContext.createTempSymbol();
+      OutStreamer->emitLabel(Dot);
+      Location = MCBinaryExpr::createSub(
+          MCSymbolRefExpr::create(Sled.Sled, OutContext),
+          MCSymbolRefExpr::create(Dot, OutContext), OutContext);
+    }
+    Sled.emit(WordSizeBytes, OutStreamer.get(), Location, CurrentFnSym);
+  }
   MCSymbol *SledsEnd = OutContext.createTempSymbol("xray_sleds_end", true);
   OutStreamer->emitLabel(SledsEnd);
 

diff  --git a/llvm/lib/Target/X86/X86MCInstLower.cpp b/llvm/lib/Target/X86/X86MCInstLower.cpp
index 4bec5bb91ae9..2c56adb36d90 100644
--- a/llvm/lib/Target/X86/X86MCInstLower.cpp
+++ b/llvm/lib/Target/X86/X86MCInstLower.cpp
@@ -1508,10 +1508,10 @@ void X86AsmPrinter::LowerPATCHABLE_EVENT_CALL(const MachineInstr &MI,
 
   OutStreamer->AddComment("xray custom event end.");
 
-  // Record the sled version. Older versions of this sled were spelled
-  // 
diff erently, so we let the runtime handle the 
diff erent offsets we're
-  // using.
-  recordSled(CurSled, MI, SledKind::CUSTOM_EVENT, 1);
+  // Record the sled version. Version 0 of this sled was spelled 
diff erently, so
+  // we let the runtime handle the 
diff erent offsets we're using. Version 2
+  // changed the absolute address to a PC-relative address.
+  recordSled(CurSled, MI, SledKind::CUSTOM_EVENT, 2);
 }
 
 void X86AsmPrinter::LowerPATCHABLE_TYPED_EVENT_CALL(const MachineInstr &MI,
@@ -1612,7 +1612,7 @@ void X86AsmPrinter::LowerPATCHABLE_TYPED_EVENT_CALL(const MachineInstr &MI,
   OutStreamer->AddComment("xray typed event end.");
 
   // Record the sled version.
-  recordSled(CurSled, MI, SledKind::TYPED_EVENT, 0);
+  recordSled(CurSled, MI, SledKind::TYPED_EVENT, 2);
 }
 
 void X86AsmPrinter::LowerPATCHABLE_FUNCTION_ENTER(const MachineInstr &MI,
@@ -1652,7 +1652,7 @@ void X86AsmPrinter::LowerPATCHABLE_FUNCTION_ENTER(const MachineInstr &MI,
   // FIXME: Find another less hacky way do force the relative jump.
   OutStreamer->emitBytes("\xeb\x09");
   EmitNops(*OutStreamer, 9, Subtarget->is64Bit(), getSubtargetInfo());
-  recordSled(CurSled, MI, SledKind::FUNCTION_ENTER);
+  recordSled(CurSled, MI, SledKind::FUNCTION_ENTER, 2);
 }
 
 void X86AsmPrinter::LowerPATCHABLE_RET(const MachineInstr &MI,
@@ -1684,7 +1684,7 @@ void X86AsmPrinter::LowerPATCHABLE_RET(const MachineInstr &MI,
       Ret.addOperand(MaybeOperand.getValue());
   OutStreamer->emitInstruction(Ret, getSubtargetInfo());
   EmitNops(*OutStreamer, 10, Subtarget->is64Bit(), getSubtargetInfo());
-  recordSled(CurSled, MI, SledKind::FUNCTION_EXIT);
+  recordSled(CurSled, MI, SledKind::FUNCTION_EXIT, 2);
 }
 
 void X86AsmPrinter::LowerPATCHABLE_TAIL_CALL(const MachineInstr &MI,
@@ -1708,7 +1708,7 @@ void X86AsmPrinter::LowerPATCHABLE_TAIL_CALL(const MachineInstr &MI,
   OutStreamer->emitBytes("\xeb\x09");
   EmitNops(*OutStreamer, 9, Subtarget->is64Bit(), getSubtargetInfo());
   OutStreamer->emitLabel(Target);
-  recordSled(CurSled, MI, SledKind::TAIL_CALL);
+  recordSled(CurSled, MI, SledKind::TAIL_CALL, 2);
 
   unsigned OpCode = MI.getOperand(0).getImm();
   OpCode = convertTailJumpOpcode(OpCode);

diff  --git a/llvm/test/CodeGen/X86/xray-attribute-instrumentation.ll b/llvm/test/CodeGen/X86/xray-attribute-instrumentation.ll
index e032e65a6c62..8d1d2bc77c64 100644
--- a/llvm/test/CodeGen/X86/xray-attribute-instrumentation.ll
+++ b/llvm/test/CodeGen/X86/xray-attribute-instrumentation.ll
@@ -49,9 +49,12 @@ NotEqual:
 }
 ; CHECK-LABEL: xray_instr_map
 ; CHECK-LABEL: Lxray_sleds_start1:
-; CHECK:       .quad {{.*}}xray_sled_2
-; CHECK:       .quad {{.*}}xray_sled_3
-; CHECK:       .quad {{.*}}xray_sled_4
+; CHECK:       Ltmp2:
+; CHECK-NEXT:   .quad {{.*}}xray_sled_2-{{\.?}}Ltmp2
+; CHECK:       Ltmp3:
+; CHECK-NEXT:   .quad {{.*}}xray_sled_3-{{\.?}}Ltmp3
+; CHECK:       Ltmp4:
+; CHECK-NEXT:   .quad {{.*}}xray_sled_4-{{\.?}}Ltmp4
 ; CHECK-LABEL: Lxray_sleds_end1:
 ; CHECK-LABEL: xray_fn_idx
 ; CHECK:       .quad {{.*}}xray_sleds_start1

diff  --git a/llvm/test/CodeGen/X86/xray-log-args.ll b/llvm/test/CodeGen/X86/xray-log-args.ll
index de0833a41b74..7ec1b34094d3 100644
--- a/llvm/test/CodeGen/X86/xray-log-args.ll
+++ b/llvm/test/CodeGen/X86/xray-log-args.ll
@@ -7,17 +7,19 @@ define i32 @callee(i32 %arg) nounwind noinline uwtable "function-instrument"="xr
   ret i32 %arg
 }
 ; CHECK-LABEL: Lxray_sleds_start0:
-; CHECK:  .quad {{\.?}}Lxray_sled_0
-; CHECK:  .quad {{_?}}callee
-; CHECK:  .byte 0x03
-; CHECK:  .byte 0x01
-; CHECK:  .byte 0x00
-; CHECK:  .{{(zero|space)}}  13
-; CHECK:  .quad {{\.?}}Lxray_sled_1
-; CHECK:  .quad {{_?}}callee
-; CHECK:  .byte 0x01
-; CHECK:  .byte 0x01
-; CHECK:  .byte 0x00
+; CHECK-NEXT:  Ltmp0:
+; CHECK-NEXT:   .quad {{\.?}}Lxray_sled_0-{{\.?}}Ltmp0
+; CHECK-NEXT:   .quad {{_?}}callee
+; CHECK-NEXT:   .byte 0x03
+; CHECK-NEXT:   .byte 0x01
+; CHECK-NEXT:   .byte 0x02
+; CHECK:        .{{(zero|space)}}  13
+; CHECK:       Ltmp1:
+; CHECK-NEXT:   .quad {{\.?}}Lxray_sled_1-{{\.?}}Ltmp1
+; CHECK-NEXT:   .quad {{_?}}callee
+; CHECK-NEXT:   .byte 0x01
+; CHECK-NEXT:   .byte 0x01
+; CHECK-NEXT:   .byte 0x02
 ; CHECK:  .{{(zero|space)}}  13
 
 define i32 @caller(i32 %arg) nounwind noinline uwtable "function-instrument"="xray-always" "xray-log-args"="1" {
@@ -25,15 +27,17 @@ define i32 @caller(i32 %arg) nounwind noinline uwtable "function-instrument"="xr
   ret i32 %retval
 }
 ; CHECK-LABEL: Lxray_sleds_start1:
-; CHECK:  .quad {{\.?}}Lxray_sled_2
-; CHECK:  .quad {{_?}}caller
-; CHECK:  .byte 0x03
-; CHECK:  .byte 0x01
-; CHECK:  .byte 0x00
+; CHECK-NEXT:  Ltmp3:
+; CHECK-NEXT:   .quad {{\.?}}Lxray_sled_2-{{\.?}}Ltmp3
+; CHECK-NEXT:   .quad {{_?}}caller
+; CHECK-NEXT:   .byte 0x03
+; CHECK-NEXT:   .byte 0x01
+; CHECK-NEXT:   .byte 0x02
 ; CHECK:  .{{(zero|space)}}  13
-; CHECK:  .quad {{\.?}}Lxray_sled_3
-; CHECK:  .quad {{_?}}caller
-; CHECK:  .byte 0x02
-; CHECK:  .byte 0x01
-; CHECK:  .byte 0x00
+; CHECK:       Ltmp4:
+; CHECK-NEXT:   .quad {{\.?}}Lxray_sled_3-{{\.?}}Ltmp4
+; CHECK-NEXT:   .quad {{_?}}caller
+; CHECK-NEXT:   .byte 0x02
+; CHECK-NEXT:   .byte 0x01
+; CHECK-NEXT:   .byte 0x02
 ; CHECK:  .{{(zero|space)}}  13

diff  --git a/llvm/test/CodeGen/X86/xray-section-group.ll b/llvm/test/CodeGen/X86/xray-section-group.ll
index 7c5d38ad1709..9bfe82d400c2 100644
--- a/llvm/test/CodeGen/X86/xray-section-group.ll
+++ b/llvm/test/CodeGen/X86/xray-section-group.ll
@@ -5,14 +5,14 @@
 define i32 @foo() nounwind noinline uwtable "function-instrument"="xray-always" {
 ; CHECK: .section .text.foo,"ax", at progbits
   ret i32 0
-; CHECK: .section xray_instr_map,"awo", at progbits,foo{{$}}
+; CHECK: .section xray_instr_map,"ao", at progbits,foo{{$}}
 }
 
 $bar = comdat any
 define i32 @bar() nounwind noinline uwtable "function-instrument"="xray-always" comdat($bar) {
 ; CHECK: .section .text.bar,"axG", at progbits,bar,comdat
   ret i32 1
-; CHECK: .section xray_instr_map,"aGwo", at progbits,bar,comdat,bar{{$}}
+; CHECK: .section xray_instr_map,"aGo", at progbits,bar,comdat,bar{{$}}
 }
 
 ; CHECK-OBJ:      section xray_instr_map:

diff  --git a/llvm/test/DebugInfo/X86/xray-split-dwarf-interaction.ll b/llvm/test/DebugInfo/X86/xray-split-dwarf-interaction.ll
index dd3f4d8a5152..404bb4b63215 100644
--- a/llvm/test/DebugInfo/X86/xray-split-dwarf-interaction.ll
+++ b/llvm/test/DebugInfo/X86/xray-split-dwarf-interaction.ll
@@ -25,11 +25,11 @@
 ; `a::b()` is actually associated with the function's symbol instead of the
 ; .debug_types.dwo section.
 ;
-; CHECK-ASM: xray_fn_idx,"awo", at progbits,_ZN1a1bEv{{$}}
+; CHECK-ASM: xray_fn_idx,"ao", at progbits,_ZN1a1bEv{{$}}
 ;
 ; CHECK-ELF-DAG: [[FSECT:[0-9]+]]] .text._ZN1a1bEv PROGBITS
 ; CHECK-ELF-DAG: [{{.*}}] .debug_types.dwo PROGBITS
-; CHECK-ELF-DAG: [{{.*}}] xray_instr_map PROGBITS {{.*}} {{.*}} {{.*}} {{.*}} WAL [[FSECT]]
+; CHECK-ELF-DAG: [{{.*}}] xray_instr_map PROGBITS {{.*}} {{.*}} {{.*}} {{.*}} AL [[FSECT]]
 target triple = "x86_64-pc-linux"
 
 %class.a = type { i8 }


        


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