[PATCH] D77435: [llvm][CodeGen] Addressing modes for SVE stN.

[Francesco Petrogalli via Phabricator via llvm-commits]

fpetrogalli added inline comments.


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Comment at: llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp:1425
+  const bool IsRegImm =
+      SelectAddrModeIndexedSVE<-8 /*Min*/, 7 /*Max*/>(N, Base, Base, Offset);
+
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c-rhodes wrote:
> c-rhodes wrote:
> > I think comments with var names are usually written like: `/*Min=*/-8, /*Max=*/7`
> The parameters here are a bit confusing, `N` is passed as `Root` and `Base` for `N` and `Base`? Are both `N` and `Base` necessary or could this be refactored?
`Root` and `N` need to be passed because of the way the ComplexPatterns in tablegen require to define such methods when defining the addressing modes. To make it more explicit what is in input and what is in output in this method, I have changed its signature to return the opcode, the new optimized base and offset as a tuple. The names of the variables should now make it clear what it in input and what is in output.


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Comment at: llvm/test/CodeGen/AArch64/sve-intrinsics-stN-reg-imm-addr-mode.ll:246
+; CHECK-LABEL: st3b_i8_valid_imm_lower_bound:
+; CHECK:      st3b { z0.b, z1.b, z2.b }, p0, [x0, #-24, mul vl]
+; CHECK-NEXT: ret
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c-rhodes wrote:
> nit: formatting
Not sure what you want me to do here.


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https://reviews.llvm.org/D77435