[llvm] 3c87fba - [InstCombine] add tests for bitcasted shuffle operand; NFC

Sanjay Patel via llvm-commits llvm-commits at lists.llvm.org
Tue Apr 14 11:01:59 PDT 2020


Author: Sanjay Patel
Date: 2020-04-14T13:57:30-04:00
New Revision: 3c87fba27f85d31a6474512248484be64a0576e5

URL: https://github.com/llvm/llvm-project/commit/3c87fba27f85d31a6474512248484be64a0576e5
DIFF: https://github.com/llvm/llvm-project/commit/3c87fba27f85d31a6474512248484be64a0576e5.diff

LOG: [InstCombine] add tests for bitcasted shuffle operand; NFC

Similar to D76844, but this is casted from wider element type.
See D77881.

Added: 
    

Modified: 
    llvm/test/Transforms/InstCombine/shufflevec-bitcast.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/InstCombine/shufflevec-bitcast.ll b/llvm/test/Transforms/InstCombine/shufflevec-bitcast.ll
index 5af4f50a191f..63f7472ff20e 100644
--- a/llvm/test/Transforms/InstCombine/shufflevec-bitcast.ll
+++ b/llvm/test/Transforms/InstCombine/shufflevec-bitcast.ll
@@ -108,3 +108,59 @@ define <4 x i16> @splat_bitcast_operand_wider_src_elt(<2 x i32> %x) {
   %s2 = shufflevector <4 x i16> %bc, <4 x i16> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
   ret <4 x i16> %s2
 }
+
+define <4 x i16> @splat_bitcast_operand_wider_src_elt_uses(<2 x i32> %x) {
+; CHECK-LABEL: @splat_bitcast_operand_wider_src_elt_uses(
+; CHECK-NEXT:    [[S1:%.*]] = shufflevector <2 x i32> [[X:%.*]], <2 x i32> undef, <2 x i32> <i32 1, i32 1>
+; CHECK-NEXT:    [[BC:%.*]] = bitcast <2 x i32> [[S1]] to <4 x i16>
+; CHECK-NEXT:    call void @use(<4 x i16> [[BC]])
+; CHECK-NEXT:    [[S2:%.*]] = shufflevector <4 x i16> [[BC]], <4 x i16> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
+; CHECK-NEXT:    ret <4 x i16> [[S2]]
+;
+  %s1 = shufflevector <2 x i32> %x, <2 x i32> undef, <2 x i32> <i32 1, i32 1>
+  %bc = bitcast <2 x i32> %s1 to <4 x i16>
+  call void @use(<4 x i16> %bc)
+  %s2 = shufflevector <4 x i16> %bc, <4 x i16> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
+  ret <4 x i16> %s2
+}
+
+; Scaled mask is inverse of first mask.
+
+define <16 x i8> @shuf_bitcast_operand_wider_src(<4 x i32> %x) {
+; CHECK-LABEL: @shuf_bitcast_operand_wider_src(
+; CHECK-NEXT:    [[S1:%.*]] = shufflevector <4 x i32> [[X:%.*]], <4 x i32> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
+; CHECK-NEXT:    [[BC:%.*]] = bitcast <4 x i32> [[S1]] to <16 x i8>
+; CHECK-NEXT:    [[S2:%.*]] = shufflevector <16 x i8> [[BC]], <16 x i8> undef, <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3>
+; CHECK-NEXT:    ret <16 x i8> [[S2]]
+;
+  %s1 = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
+  %bc = bitcast <4 x i32> %s1 to <16 x i8>
+  %s2 = shufflevector <16 x i8> %bc, <16 x i8> undef, <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3>
+  ret <16 x i8> %s2
+}
+
+define <16 x i8> @shuf_bitcast_operand_cannot_widen(<4 x i32> %x) {
+; CHECK-LABEL: @shuf_bitcast_operand_cannot_widen(
+; CHECK-NEXT:    [[S1:%.*]] = shufflevector <4 x i32> [[X:%.*]], <4 x i32> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
+; CHECK-NEXT:    [[BC:%.*]] = bitcast <4 x i32> [[S1]] to <16 x i8>
+; CHECK-NEXT:    [[S2:%.*]] = shufflevector <16 x i8> [[BC]], <16 x i8> undef, <16 x i32> <i32 12, i32 13, i32 12, i32 13, i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3>
+; CHECK-NEXT:    ret <16 x i8> [[S2]]
+;
+  %s1 = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
+  %bc = bitcast <4 x i32> %s1 to <16 x i8>
+  %s2 = shufflevector <16 x i8> %bc, <16 x i8> undef, <16 x i32> <i32 12, i32 13, i32 12, i32 13, i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3>
+  ret <16 x i8> %s2
+}
+
+define <16 x i8> @shuf_bitcast_operand_cannot_widen_undef(<4 x i32> %x) {
+; CHECK-LABEL: @shuf_bitcast_operand_cannot_widen_undef(
+; CHECK-NEXT:    [[S1:%.*]] = shufflevector <4 x i32> [[X:%.*]], <4 x i32> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
+; CHECK-NEXT:    [[BC:%.*]] = bitcast <4 x i32> [[S1]] to <16 x i8>
+; CHECK-NEXT:    [[S2:%.*]] = shufflevector <16 x i8> [[BC]], <16 x i8> undef, <16 x i32> <i32 12, i32 undef, i32 14, i32 15, i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3>
+; CHECK-NEXT:    ret <16 x i8> [[S2]]
+;
+  %s1 = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
+  %bc = bitcast <4 x i32> %s1 to <16 x i8>
+  %s2 = shufflevector <16 x i8> %bc, <16 x i8> undef, <16 x i32> <i32 12, i32 undef, i32 14, i32 15, i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3>
+  ret <16 x i8> %s2
+}


        


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