[llvm] 071c64d - [X86] Add a more accurate truncate cost for v8i64->v8i8

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Mon Apr 13 21:09:58 PDT 2020


Author: Craig Topper
Date: 2020-04-13T21:09:41-07:00
New Revision: 071c64d68d1d0c762c6d532f5312099e596c21ae

URL: https://github.com/llvm/llvm-project/commit/071c64d68d1d0c762c6d532f5312099e596c21ae
DIFF: https://github.com/llvm/llvm-project/commit/071c64d68d1d0c762c6d532f5312099e596c21ae.diff

LOG: [X86] Add a more accurate truncate cost for v8i64->v8i8

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86TargetTransformInfo.cpp
    llvm/test/Analysis/CostModel/X86/min-legal-vector-width.ll
    llvm/test/Analysis/CostModel/X86/trunc.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
index ad413a786cce..fc7c31768726 100644
--- a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
+++ b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
@@ -1377,6 +1377,7 @@ int X86TTIImpl::getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
 
     { ISD::TRUNCATE,  MVT::v16i8,   MVT::v16i32, 1 },
     { ISD::TRUNCATE,  MVT::v16i16,  MVT::v16i32, 1 },
+    { ISD::TRUNCATE,  MVT::v8i8,    MVT::v8i64,  2 },
     { ISD::TRUNCATE,  MVT::v8i16,   MVT::v8i64,  1 },
     { ISD::TRUNCATE,  MVT::v8i32,   MVT::v8i64,  1 },
 

diff  --git a/llvm/test/Analysis/CostModel/X86/min-legal-vector-width.ll b/llvm/test/Analysis/CostModel/X86/min-legal-vector-width.ll
index 8a4e774a4a8e..d75e964e87ae 100644
--- a/llvm/test/Analysis/CostModel/X86/min-legal-vector-width.ll
+++ b/llvm/test/Analysis/CostModel/X86/min-legal-vector-width.ll
@@ -139,7 +139,7 @@ define void @trunc256() "min-legal-vector-width"="256" {
 ; VEC512-LABEL: 'trunc256'
 ; VEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %A = trunc <8 x i64> undef to <8 x i32>
 ; VEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %B = trunc <8 x i64> undef to <8 x i16>
-; VEC512-NEXT:  Cost Model: Found an estimated cost of 11 for instruction: %C = trunc <8 x i64> undef to <8 x i8>
+; VEC512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %C = trunc <8 x i64> undef to <8 x i8>
 ; VEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %D = trunc <16 x i32> undef to <16 x i16>
 ; VEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %E = trunc <16 x i32> undef to <16 x i8>
 ; VEC512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %F = trunc <32 x i16> undef to <32 x i8>

diff  --git a/llvm/test/Analysis/CostModel/X86/trunc.ll b/llvm/test/Analysis/CostModel/X86/trunc.ll
index d91c817fd837..792310febc14 100644
--- a/llvm/test/Analysis/CostModel/X86/trunc.ll
+++ b/llvm/test/Analysis/CostModel/X86/trunc.ll
@@ -282,7 +282,7 @@ define i32 @trunc_vXi8() {
 ; AVX512F-LABEL: 'trunc_vXi8'
 ; AVX512F-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = trunc <2 x i64> undef to <2 x i8>
 ; AVX512F-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i64 = trunc <4 x i64> undef to <4 x i8>
-; AVX512F-NEXT:  Cost Model: Found an estimated cost of 11 for instruction: %V8i64 = trunc <8 x i64> undef to <8 x i8>
+; AVX512F-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i64 = trunc <8 x i64> undef to <8 x i8>
 ; AVX512F-NEXT:  Cost Model: Found an estimated cost of 11 for instruction: %V16i64 = trunc <16 x i64> undef to <16 x i8>
 ; AVX512F-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: %V32i64 = trunc <32 x i64> undef to <32 x i8>
 ; AVX512F-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: %V64i64 = trunc <64 x i64> undef to <64 x i8>
@@ -303,7 +303,7 @@ define i32 @trunc_vXi8() {
 ; AVX512BW-LABEL: 'trunc_vXi8'
 ; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = trunc <2 x i64> undef to <2 x i8>
 ; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i64 = trunc <4 x i64> undef to <4 x i8>
-; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 11 for instruction: %V8i64 = trunc <8 x i64> undef to <8 x i8>
+; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i64 = trunc <8 x i64> undef to <8 x i8>
 ; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 11 for instruction: %V16i64 = trunc <16 x i64> undef to <16 x i8>
 ; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: %V32i64 = trunc <32 x i64> undef to <32 x i8>
 ; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V64i64 = trunc <64 x i64> undef to <64 x i8>


        


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