[PATCH] D77783: [MachineVerifier] Relax verifier for predicated returns

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

In general, if we predicate a call, I think we need to somehow indicate the fact that the registers in the mask may not be clobbered by the call.  This isn't really specific to tail calls, but I guess we don't currently predicate other calls on ARM?

Probably the right solution from a modeling perspective involves changing the predication code to correctly define the registers in question, as opposed to changing the verifier to understand what the backend currently generates.  Maybe we need a special "predicated register mask" operand.

Related to bad modeling of predicated returns, I have a patch https://reviews.llvm.org/D40061 which I never got around to finishing.  Only loosely related to this, though.


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https://reviews.llvm.org/D77783