[PATCH] D77576: [globalisel] Add lost debug locations verifier

[Daniel Sanders via Phabricator via llvm-commits]

dsanders created this revision.
dsanders added reviewers: bogner, aprantl, vsk.
Herald added subscribers: kerbowa, volkan, hiraditya, rovka, mgorny, nhaehnle, jvesely.
Herald added a project: LLVM.
dsanders added reviewers: aemerson, paquette, arsenm.
Herald added a subscriber: wdng.

This verifier tries to ensure that DebugLoc's don't just disappear as
we transform the MIR. It observes the instructions created, erased, and
changed and at checkpoints chosen by the client algorithm verifies the
locations affected by those changes.

In particular, it verifies that:

- Every DebugLoc for an erased/changing instruction is still present on at least one new/changed instruction
- Failing that, that there is a line-0 location in the new/changed instructions. It's not possible to confirm which locations were merged so it conservatively assumes all unaccounted for locations are accounted for by any line-0 location to avoid false positives.

If that fails, it prints the lost locations in the debug output along with
the instructions that should have accounted for them.

In theory, this is usable by the legalizer, combiner, selector and any other
pass that performs incremental changes to the MIR. However, it has so far
only really been tested on the legalizer (not including the artifact
combiner) where it has caught lots of lost locations, particularly in Custom
legalizations. There's only one example here as my initial testing was on an
out-of-tree target and I haven't done a pass over the in-tree targets yet.

Depends on D77575 <https://reviews.llvm.org/D77575>, D77446 <https://reviews.llvm.org/D77446>


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D77576

Files:
  llvm/include/llvm/CodeGen/GlobalISel/Legalizer.h
  llvm/include/llvm/CodeGen/GlobalISel/LostDebugLocObserver.h
  llvm/lib/CodeGen/GlobalISel/CMakeLists.txt
  llvm/lib/CodeGen/GlobalISel/Legalizer.cpp
  llvm/lib/CodeGen/GlobalISel/LostDebugLocObserver.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-memcpy-et-al.mir
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-vaarg.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-add.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-addrspacecast.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-amdgcn.wavefrontsize.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomic-cmpxchg.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-brcond.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bswap.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-build-vector.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract-vector-elt.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcos.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fdiv.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fexp.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ffloor.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-flog.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-flog10.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmad.s16.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmad.s32.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmaxnum.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fminnum.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpow.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fptosi.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fptoui.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fptrunc.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsin.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-insert-vector-elt.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-intrinsic-amdgcn-fdiv-fast.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-mul.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-saddo.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.s16.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sitofp.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssubo.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sub.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uaddo.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-udiv.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uitofp.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-urem.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usubo.mir

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