[PATCH] D31615: AMDGPU: Add way to specify that instructions zero high 16-bits

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Apr 5 07:59:57 PDT 2020

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arsenm abandoned this revision.
arsenm added a comment.
Herald added subscribers: kerbowa, jvesely.

This needs to be redone differently with subregisters


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D31615/new/

https://reviews.llvm.org/D31615

Previous message: [PATCH] D40578: AMDGPU: Make hazard recognizer aware of maximum clause sizes
Next message: [PATCH] D72639: AMDGPU/GlobalISel: Fix select of <3 x s16>/ <4 x s16> insert/extract
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