[llvm] 9f5c786 - [NFC] G_DYN_STACKALLOC realign iff align > 1, update documentation

[Guillaume Chatelet via llvm-commits]

Author: Guillaume Chatelet
Date: 2020-04-03T08:12:39Z
New Revision: 9f5c786876ce213578037006e95536f171cc189e

URL: https://github.com/llvm/llvm-project/commit/9f5c786876ce213578037006e95536f171cc189e
DIFF: https://github.com/llvm/llvm-project/commit/9f5c786876ce213578037006e95536f171cc189e.diff

LOG: [NFC] G_DYN_STACKALLOC realign iff align > 1, update documentation

Summary: I think it would be better to require the alignment to be >= 1. It is currently confusing to allow both values.

Reviewers: courbet

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77372

Added: 
    

Modified: 
    llvm/docs/GlobalISel/GenericOpcode.rst
    llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp

Removed: 
    


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diff  --git a/llvm/docs/GlobalISel/GenericOpcode.rst b/llvm/docs/GlobalISel/GenericOpcode.rst
index 3110e1fa8398..7c418a0c05c1 100644
--- a/llvm/docs/GlobalISel/GenericOpcode.rst
+++ b/llvm/docs/GlobalISel/GenericOpcode.rst
@@ -672,12 +672,9 @@ Other Operations
 G_DYN_STACKALLOC
 ^^^^^^^^^^^^^^^^
 
-Dynamically realign the stack pointer to the specified alignment
+Dynamically realigns the stack pointer to the specified size and alignment.
+An alignment value of `0` or `1` mean no specific alignment.
 
 .. code-block:: none
 
   %8:_(p0) = G_DYN_STACKALLOC %7(s64), 32
-
-.. caution::
-
-  What does it mean for the immediate to be 0? It happens in the tests

diff  --git a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
index bb144480bbd4..3c24933921b2 100644
--- a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
@@ -4891,7 +4891,7 @@ LegalizerHelper::LegalizeResult
 LegalizerHelper::lowerDynStackAlloc(MachineInstr &MI) {
   Register Dst = MI.getOperand(0).getReg();
   Register AllocSize = MI.getOperand(1).getReg();
-  unsigned Align = MI.getOperand(2).getImm();
+  Align Alignment = assumeAligned(MI.getOperand(2).getImm());
 
   const auto &MF = *MI.getMF();
   const auto &TLI = *MF.getSubtarget().getTargetLowering();
@@ -4907,8 +4907,8 @@ LegalizerHelper::lowerDynStackAlloc(MachineInstr &MI) {
   // have to generate an extra instruction to negate the alloc and then use
   // G_PTR_ADD to add the negative offset.
   auto Alloc = MIRBuilder.buildSub(IntPtrTy, SPTmp, AllocSize);
-  if (Align) {
-    APInt AlignMask(IntPtrTy.getSizeInBits(), Align, true);
+  if (Alignment > Align(1)) {
+    APInt AlignMask(IntPtrTy.getSizeInBits(), Alignment.value(), true);
     AlignMask.negate();
     auto AlignCst = MIRBuilder.buildConstant(IntPtrTy, AlignMask);
     Alloc = MIRBuilder.buildAnd(IntPtrTy, Alloc, AlignCst);