[PATCH] D77018: [MC][RISCV] Make .reloc support arbitrary relocation types

[Fangrui Song via Phabricator via llvm-commits]

MaskRay marked 2 inline comments as done.
MaskRay added inline comments.


================
Comment at: llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp:93-94
                                             const MCValue &Target) {
+  if (Fixup.getKind() >= FirstLiteralRelocationKind)
+    return true;
   switch (Fixup.getTargetKind()) {
----------------
luismarques wrote:
> Shouldn't this also check the upper bound?
Not very necessarily.

D76746 touched the upper bound. The point of the upper bound is actually quite weak: it is used as an `assert` in `MCFixup::create` to reject certain apparently invalid relocations.

I want to keep the code as-is to be consistent with changes I made to ARM/AArch64/X86/PowerPC.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D77018/new/

https://reviews.llvm.org/D77018