[PATCH] D77207: [AVR] Fix I/O instructions on XMEGA

[Vlastimil Labsky via Phabricator via llvm-commits]

vlastik created this revision.
vlastik added a reviewer: dylanmckay.
Herald added subscribers: llvm-commits, Jim, hiraditya.
Herald added a project: LLVM.
vlastik updated this revision to Diff 254146.
vlastik added a comment.

Fixed 16bit accesses too


On XMEGA, I/O address space is same as data address space - there is no 0x20 offset,
because CPU General Purpose Registers are not mapped in data address space.

>From https://en.wikipedia.org/wiki/AVR_microcontrollers

> In the XMEGA variant, the working register file is not mapped into the data address space; as such, it is not possible to treat any of the XMEGA's working registers as though they were SRAM. Instead, the I/O registers are mapped into the data address space starting at the very beginning of the address space.




https://reviews.llvm.org/D77207

Files:
  llvm/lib/Target/AVR/AVRDevices.td
  llvm/lib/Target/AVR/AVRInstrInfo.td
  llvm/lib/Target/AVR/AVRSubtarget.cpp
  llvm/lib/Target/AVR/AVRSubtarget.h

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