[PATCH] D77202: [Target][ARM] Fold or(A, B) more aggressively

[Pierre van Houtryve via Phabricator via llvm-commits]

Pierre-vh created this revision.
Pierre-vh added a reviewer: dmgreen.
Herald added subscribers: llvm-commits, danielkiss, hiraditya, kristof.beyls.
Herald added a project: LLVM.
Pierre-vh added a parent revision: D77201: [CodeGen][SelectionDAG] Flip Booleans More Often.
Pierre-vh added reviewers: SjoerdMeijer, samparker, simon_tatham, ostannard.

This is a change to the ARM backend that folds `or(A, B)` into `not(and(not(A), not(B)))` more often.
This actually generates better code in my tests, as `not` and `and` are essentially free compared to `or` when manipulating the `VPR` register.

- `and` becomes a VPT block (no extra instruction)
- `not` becomes a `vpnot`, which is often removed by the MVE VPT Block Insertion pass to create VPT blocks (no extra instructions).

However, I'm not fully sure it's a good change, and I believe the implementation could be better, which is why I need some help to review this.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D77202

Files:
  llvm/lib/Target/ARM/ARMISelLowering.cpp
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/cond-vector-reduce-mve-codegen.ll
  llvm/test/CodeGen/Thumb2/mve-pred-or.ll
  llvm/test/CodeGen/Thumb2/mve-pred-threshold.ll

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